diff --git a/ports/alif/ospi_flash.c b/ports/alif/ospi_flash.c index c3ae50a9ee..8bffd69805 100644 --- a/ports/alif/ospi_flash.c +++ b/ports/alif/ospi_flash.c @@ -238,9 +238,9 @@ int ospi_flash_init(void) { ospi_flash_t *self = &global_flash; const ospi_pin_settings_t *pin = &ospi_pin_settings; - const ospi_flash_settings_t *set = &ospi_flash_settings; + const ospi_flash_settings_t *set = NULL; + self->pin = pin; - self->set = set; uint32_t pad_ctrl = PADCTRL_OUTPUT_DRIVE_STRENGTH_12MA | PADCTRL_SLEW_RATE_FAST | PADCTRL_READ_ENABLE; @@ -283,16 +283,32 @@ int ospi_flash_init(void) { } self->cfg.ser = 1; // enable slave select self->cfg.addrlen = 8; // 32-bit address length - self->cfg.ospi_clock = set->freq_hz; self->cfg.ddr_en = 0; self->cfg.wait_cycles = 0; // used only for ospi_xip_exit + self->cfg.ospi_clock = 100000; // use 100KHz for detection. ospi_init(&self->cfg); - // Check the device ID before attempting to switch to octal mode (if needed). - if (ospi_flash_read_id_spi(self) != set->jedec_id) { + // Read the device ID. + uint32_t jedec_id = ospi_flash_read_id_spi(self); + + // Auto-detect the flash. + for (size_t i = 0; i < ospi_flash_settings_len; i++) { + set = &ospi_flash_settings[i]; + if (jedec_id == set->jedec_id) { + self->set = set; + break; + } + } + + if (self->set == NULL) { + // Flash part is not supported. return -1; } + // Switch to the higher frequency. + self->cfg.ospi_clock = set->freq_hz; + ospi_init(&self->cfg); + // Switch to octal mode if needed. if (set->octal_switch != NULL) { set->octal_switch(self); diff --git a/ports/alif/ospi_flash.h b/ports/alif/ospi_flash.h index 8fe69764a3..20846d4471 100644 --- a/ports/alif/ospi_flash.h +++ b/ports/alif/ospi_flash.h @@ -27,6 +27,7 @@ #define MICROPY_INCLUDED_ALIF_OSPI_FLASH_H #include "py/mphal.h" +#include "ospi_flash_settings.h" // Format of command, address and data phases. enum { @@ -74,7 +75,8 @@ typedef struct _ospi_flash_settings_t { // Provided by the board when it enables OSPI. extern const ospi_pin_settings_t ospi_pin_settings; -extern const ospi_flash_settings_t ospi_flash_settings; +extern const ospi_flash_settings_t ospi_flash_settings[]; +extern const size_t ospi_flash_settings_len; // Functions specific to ISSI flash chips. int ospi_flash_issi_octal_switch(struct _ospi_flash_t *self); diff --git a/ports/alif/ospi_flash_settings.h b/ports/alif/ospi_flash_settings.h new file mode 100644 index 0000000000..c409f856df --- /dev/null +++ b/ports/alif/ospi_flash_settings.h @@ -0,0 +1,79 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2024 OpenMV LLC. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef __OSPI_FLASH_SETTINGS_H__ +#define __OSPI_FLASH_SETTINGS_H__ +#include +#include "ospi_flash.h" + +// Macronix MX25 +#define OSPI_FLASH_SETTINGS_MX25 \ + .octal_switch = ospi_flash_mx_octal_switch, \ + .octal_mode = OSPI_FLASH_OCTAL_MODE_DDD, \ + .rxds = true, \ + .inst_len = OSPI_INST_L_16bit, \ + .xip_data_len = OSPI_DATA_L_16bit, \ + .read_sr = 0x05fa, \ + .read_sr_dummy_cycles = 4, \ + .write_en = 0x06f9, \ + .read_id = 0x9f60, \ + .read_id_dummy_cycles = 4, \ + .read_command = 0xee11, \ + .write_command = 0x12ed, \ + .erase_command = 0x21de + +// Everspin EM. +#define OSPI_FLASH_SETTINGS_EM \ + .octal_switch = ospi_flash_issi_octal_switch, \ + .octal_mode = OSPI_FLASH_OCTAL_MODE_DDD, \ + .rxds = false, \ + .inst_len = OSPI_INST_L_8bit, \ + .xip_data_len = OSPI_DATA_L_16bit, \ + .read_sr = 0x05, \ + .read_sr_dummy_cycles = 8, \ + .write_en = 0x06, \ + .read_id = 0x9f, \ + .read_id_dummy_cycles = 8, \ + .read_command = 0xfd, \ + .write_command = 0xc2, \ + .erase_command = 0x21 + +// ISSI IS25. +#define OSPI_FLASH_SETTINGS_IS25 \ + .octal_switch = ospi_flash_issi_octal_switch, \ + .octal_mode = OSPI_FLASH_OCTAL_MODE_DDD, \ + .rxds = true, \ + .inst_len = OSPI_INST_L_8bit, \ + .xip_data_len = OSPI_DATA_L_16bit, \ + .read_sr = 0x05, \ + .read_sr_dummy_cycles = 8, \ + .write_en = 0x06, \ + .read_id = 0x9f, \ + .read_id_dummy_cycles = 8, \ + .read_command = 0xfd, \ + .write_command = 0xc2, \ + .erase_command = 0x21 +#endif // __OSPI_FLASH_SETTINGS_H__