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https://github.com/micropython/micropython.git
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all: Fix spelling mistakes based on codespell check.
Signed-off-by: Damien George <damien@micropython.org>
This commit is contained in:
@@ -113,7 +113,7 @@ STATIC mp_obj_t adc_obj_make_new(const mp_obj_type_t *type, size_t n_args, size_
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mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
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// Unpack and check, whther the pin has ADC capability
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// Unpack and check, whether the pin has ADC capability
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int id = mp_hal_get_pin_obj(args[ARG_id].u_obj);
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adc_config_t adc_config = get_adc_config(id, busy_flags);
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@@ -98,7 +98,7 @@ void common_i2c_irq_handler(int i2c_id) {
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i2c->I2CM.INTFLAG.reg |= SERCOM_I2CM_INTFLAG_SB;
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}
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} else if (IRQ_DATA_SENT) {
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if (NACK_RECVD) { // e.g. NACK after adress for both read and write.
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if (NACK_RECVD) { // e.g. NACK after address for both read and write.
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self->state = state_nack; // force stop of transmission
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i2c->I2CM.INTFLAG.reg |= SERCOM_I2CM_INTFLAG_MB;
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} else if (self->len > 0) { // data to be sent
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@@ -200,7 +200,7 @@ mp_obj_t machine_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n
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#elif defined(MCU_SAMD51)
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NVIC_EnableIRQ(SERCOM0_0_IRQn + 4 * self->id); // MB interrupt
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NVIC_EnableIRQ(SERCOM0_0_IRQn + 4 * self->id + 1); // SB interrupt
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NVIC_EnableIRQ(SERCOM0_0_IRQn + 4 * self->id + 3); // ERRROR interrupt
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NVIC_EnableIRQ(SERCOM0_0_IRQn + 4 * self->id + 3); // ERROR interrupt
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#endif
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// Now enable I2C.
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@@ -230,7 +230,7 @@ STATIC int machine_i2c_transfer_single(mp_obj_base_t *self_in, uint16_t addr, si
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i2c->I2CM.INTENSET.reg = SERCOM_I2CM_INTENSET_MB | SERCOM_I2CM_INTENSET_SB | SERCOM_I2CM_INTENSET_ERROR;
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self->state = state_busy;
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// Send the adress, which kicks off the transfer
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// Send the address, which kicks off the transfer
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i2c->I2CM.ADDR.bit.ADDR = (addr << 1) | READ_MODE;
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// Transfer the data
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@@ -507,7 +507,7 @@ STATIC mp_uint_t machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint
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}
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} else if (request == MP_STREAM_FLUSH) {
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// The timeout is defined by the buffer size and the baudrate.
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// Take the worst case assumtions at 13 bit symbol size times 2.
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// Take the worst case assumptions at 13 bit symbol size times 2.
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uint64_t timeout = mp_hal_ticks_ms_64() + (3
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#if MICROPY_HW_UART_TXBUF
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+ self->write_buffer.size
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@@ -125,14 +125,14 @@ void check_usb_recovery_mode(void) {
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// Purpose of the #defines for the clock configuration.
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//
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// Both CPU and periperal devices are clocked by the DFLL48M clock.
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// Both CPU and peripheral devices are clocked by the DFLL48M clock.
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// DFLL48M is either free running, or controlled by the 32kHz crystal, or
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// Synchronized with the USB clock.
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//
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// #define MICROPY_HW_XOSC32K (0 | 1)
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//
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// If MICROPY_HW_XOSC32K = 1, the 32kHz crystal is used as input for GCLK 1, which
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// serves as refernce clock source for the DFLL48M oscillator,
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// serves as reference clock source for the DFLL48M oscillator,
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// The crystal is used, unless MICROPY_HW_MCU_OSC32KULP is set.
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// In that case GCLK1 (and the CPU clock) is driven by the 32K Low power oscillator.
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// The reason for offering this option is a design flaw of the Adafruit
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@@ -147,11 +147,11 @@ void check_usb_recovery_mode(void) {
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// not exactly 48Mhz and has a substantional temperature drift.
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//
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// If MICROPY_HW_DFLL_USB_SYNC = 1, the DFLL48 is synchronized with the 1 kHz USB sync
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// signal. If after boot there is no USB sync withing 500ms, the configuratuion falls
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// signal. If after boot there is no USB sync within 500ms, the configuration falls
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// back to a free running 48Mhz oscillator.
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//
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// In all modes, the 48MHz signal has a substantial jitter, largest when
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// MICROPY_HW_DFLL_USB_SYNC is active. That is caused by the repective
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// MICROPY_HW_DFLL_USB_SYNC is active. That is caused by the respective
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// reference frequencies of 32kHz or 1 kHz being low. That affects most
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// PWM. Std Dev at 1kHz 0.156Hz (w. Crystal) up to 0.4 Hz (with USB sync).
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//
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@@ -171,7 +171,7 @@ void init_clocks(uint32_t cpu_freq) {
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// GCLK5: 48MHz, source: DFLL48M, usage: USB
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// GCLK8: 1kHz, source: XOSC32K or OSCULP32K, usage: WDT and RTC
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// DFLL48M: Reference sources:
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// - in closed loop mode: eiter XOSC32K or OSCULP32K or USB clock
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// - in closed loop mode: either XOSC32K or OSCULP32K or USB clock
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// from GCLK4.
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// - in open loop mode: None
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// FDPLL96M: Reference source GCLK1
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@@ -2,7 +2,7 @@
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# for some of the peripheral devices with many possible assignments.
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# The pin_cap_table is a subset from table 7-1 of the data sheet.
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# It contain the information about pin mux set and pad
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# The eic and adc columns contain the decimal numer for the respecitive
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# The eic and adc columns contain the decimal number for the respecitive
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# quantity, the columns for sercom, tc and tcc have in each cell
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# the device number in the upper nibble, and the pad number in the lower
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# nibble. If a signal is not available, the cell in the csv table is left empty.
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@@ -172,11 +172,11 @@ void check_usb_recovery_mode(void) {
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// not exactly 48Mhz and has a substantional temperature drift.
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//
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// If MICROPY_HW_DFLL_USB_SYNC = 1, the DFLL48 is synchronized with the 1 kHz USB sync
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// signal. If after boot there is no USB sync withing 500ms, the configuratuion falls
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// signal. If after boot there is no USB sync within 500ms, the configuration falls
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// back to a free running 48Mhz oscillator.
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//
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// In all modes, the 48MHz signal has a substantial jitter, largest when
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// MICROPY_HW_DFLL_USB_SYNC is active. That is caused by the repective
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// MICROPY_HW_DFLL_USB_SYNC is active. That is caused by the respective
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// reference frequencies of 32kHz or 1 kHz being low. That affects most
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// PWM. Std Dev at 1kHz 0.156Hz (w. Crystal) up to 0.4 Hz (with USB sync).
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//
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@@ -195,7 +195,7 @@ void init_clocks(uint32_t cpu_freq) {
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// GCLK4: 32kHz, source: XOSC32K, if crystal present, usage: DFLL48M reference
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// GCLK5: 48MHz, source: DFLL48M, usage: USB
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// DFLL48M: Reference sources:
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// - in closed loop mode: eiter XOSC32K or OSCULP32K or USB clock
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// - in closed loop mode: either XOSC32K or OSCULP32K or USB clock
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// - in open loop mode: None
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// DPLL0: 48 - 200 MHz
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@@ -1,9 +1,9 @@
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# The pin_cap_table is a subset from table 6-1 of the data sheet.
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# It contain the information about pin mux set and pad
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# for some of the peripheral devices with many possible assignments.
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# The colums represent the peripheral class, as defined in pin_cap_t. The
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# The columns represent the peripheral class, as defined in pin_cap_t. The
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# column number is equivalent to the mux class.
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# The eic and adc columns contain the decimal numer for the respecitive
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# The eic and adc columns contain the decimal number for the respecitive
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# quantity, the columns for sercom, tc and tcc have in each cell
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# the device number in the first, and the pad number in the second
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# digit. If a signal is not available, the cell in the csv table is left empty.
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@@ -121,7 +121,7 @@ const char *pin_name(int id) {
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return "-";
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}
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// Test, wether the given pin is defined and has signals for sercom.
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// Test, whether the given pin is defined and has signals for sercom.
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// If that applies return the alt_fct and pad_nr.
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// If not, an error will be raised.
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@@ -136,7 +136,7 @@ sercom_pad_config_t get_sercom_config(int pin_id, uint8_t sercom_nr) {
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}
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}
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// Test, wether the given pin is defined as ADC.
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// Test, whether the given pin is defined as ADC.
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// If that applies return the adc instance and channel.
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// If not, an error will be raised.
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@@ -158,7 +158,7 @@ adc_config_t get_adc_config(int pin_id, int32_t flag) {
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}
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}
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// Test, wether the given pin is defined and has signals for pwm.
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// Test, whether the given pin is defined and has signals for pwm.
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// If that applies return the alt_fct, tcc number and channel number.
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// If not, an error will be raised.
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// The function either supplies a channel from a wanted device, or
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