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py/asmarm: Fix halfword loads with larger offsets.

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This commit fixes code generation for loading halfwords using an offset
greater than 255.

The old code blindly encoded the offset into a `LDRH Rd, [Rn, #imm]`
opcode, but only the lowest 8 bits would be put into the opcode itself.
This commit instead generates a two-opcodes sequence, a constant load into
R8, and then `LDRH Rd, [Rn, R8]`.

This fixes `tests/extmod/vfs_rom.py` for the qemu/SABRELITE board.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit is contained in:
Alessandro Gatti
2025-01-14 01:28:20 +01:00
committed by Damien George
parent 928c71638c
commit c610199f2d
1 changed files with 9 additions and 2 deletions
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11
py/asmarm.c
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@@ -344,8 +344,15 @@ void asm_arm_ldrh_reg_reg(asm_arm_t *as, uint rd, uint rn) {
}
void asm_arm_ldrh_reg_reg_offset(asm_arm_t *as, uint rd, uint rn, uint byte_offset) {
// ldrh rd, [rn, #off]
emit_al(as, 0x1d000b0 | (rn << 16) | (rd << 12) | ((byte_offset & 0xf0) << 4) | (byte_offset & 0xf));
if (byte_offset < 0x100) {
// ldrh rd, [rn, #off]
emit_al(as, 0x1d000b0 | (rn << 16) | (rd << 12) | ((byte_offset & 0xf0) << 4) | (byte_offset & 0xf));
} else {
// mov r8, #off
// ldrh rd, [rn, r8]
asm_arm_mov_reg_i32_optimised(as, ASM_ARM_REG_R8, byte_offset);
emit_al(as, 0x19000b0 | (rn << 16) | (rd << 12) | ASM_ARM_REG_R8);
}
}
void asm_arm_ldrb_reg_reg(asm_arm_t *as, uint rd, uint rn) {