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py: Fix viper store on x86; add tests for viper ptr16.
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@@ -1391,7 +1391,10 @@ STATIC void emit_native_store_subscr(emit_t *emit) {
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assert(vtype_value == VTYPE_PYOBJ);
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emit_call(emit, MP_F_OBJ_SUBSCR);
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} else {
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// viper call
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// viper store
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// TODO The different machine architectures have very different
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// capabilities and requirements for stores, so probably best to
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// write a completely separate store-optimiser for each one.
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stack_info_t *top = peek_stack(emit, 0);
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if (top->vtype == VTYPE_INT && top->kind == STACK_IMM) {
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// index is an immediate
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@@ -1402,7 +1405,12 @@ STATIC void emit_native_store_subscr(emit_t *emit) {
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int reg_index = REG_ARG_2;
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int reg_value = REG_ARG_3;
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emit_pre_pop_reg_flexible(emit, &vtype_base, ®_base, reg_index, reg_value);
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#if N_X86
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// special case: x86 needs byte stores to be from lower 4 regs (REG_ARG_3 is EDX)
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emit_pre_pop_reg(emit, &vtype_value, reg_value);
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#else
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emit_pre_pop_reg_flexible(emit, &vtype_value, ®_value, reg_base, reg_index);
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#endif
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switch (vtype_base) {
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case VTYPE_PTR8: {
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// pointer to 8-bit memory
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@@ -1449,7 +1457,12 @@ STATIC void emit_native_store_subscr(emit_t *emit) {
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int reg_value = REG_ARG_3;
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emit_pre_pop_reg_flexible(emit, &vtype_index, ®_index, REG_ARG_1, reg_value);
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emit_pre_pop_reg(emit, &vtype_base, REG_ARG_1);
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#if N_X86
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// special case: x86 needs byte stores to be from lower 4 regs (REG_ARG_3 is EDX)
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emit_pre_pop_reg(emit, &vtype_value, reg_value);
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#else
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emit_pre_pop_reg_flexible(emit, &vtype_value, ®_value, REG_ARG_1, reg_index);
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#endif
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switch (vtype_base) {
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case VTYPE_PTR8: {
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// pointer to 8-bit memory
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