From e5984fb6daa6dec97993e8999d19ec55ce24ecb7 Mon Sep 17 00:00:00 2001 From: iabdalkader Date: Thu, 19 Sep 2024 14:01:30 +0200 Subject: [PATCH] stm32/boards/ARDUINO_NICLA_VISION: Update board config files. Changes are: - Add pre/post stop mode entry macros. - Make SE05X pin accessible. - Remove duplicate HAL macros. Signed-off-by: iabdalkader --- ports/stm32/boards/ARDUINO_NICLA_VISION/mpconfigboard.h | 4 ++-- ports/stm32/boards/ARDUINO_NICLA_VISION/pins.csv | 2 +- ports/stm32/boards/ARDUINO_NICLA_VISION/stm32h7xx_hal_conf.h | 2 -- 3 files changed, 3 insertions(+), 5 deletions(-) diff --git a/ports/stm32/boards/ARDUINO_NICLA_VISION/mpconfigboard.h b/ports/stm32/boards/ARDUINO_NICLA_VISION/mpconfigboard.h index 3a2def4d40..796a9fae92 100644 --- a/ports/stm32/boards/ARDUINO_NICLA_VISION/mpconfigboard.h +++ b/ports/stm32/boards/ARDUINO_NICLA_VISION/mpconfigboard.h @@ -49,8 +49,8 @@ void NICLAV_board_low_power(int mode); #define MICROPY_BOARD_ENTER_STANDBY NICLAV_board_low_power(2); void NICLAV_board_osc_enable(int enable); -#define MICROPY_BOARD_OSC_ENABLE NICLAV_board_osc_enable(1); -#define MICROPY_BOARD_OSC_DISABLE NICLAV_board_osc_enable(0); +#define MICROPY_BOARD_PRE_STOP NICLAV_board_osc_enable(0); +#define MICROPY_BOARD_POST_STOP NICLAV_board_osc_enable(1); // PLL1 400MHz/50MHz for SDMMC and FDCAN // USB and RNG are clocked from the HSI48 diff --git a/ports/stm32/boards/ARDUINO_NICLA_VISION/pins.csv b/ports/stm32/boards/ARDUINO_NICLA_VISION/pins.csv index 7996e75496..02859ef313 100644 --- a/ports/stm32/boards/ARDUINO_NICLA_VISION/pins.csv +++ b/ports/stm32/boards/ARDUINO_NICLA_VISION/pins.csv @@ -237,4 +237,4 @@ I2C3_SDA,PC9 -QSPI2_D1,-PF9 -QSPI2_D2,PE2 -QSPI2_D3,PD13 --SE05X_EN,-PG0 +SE05X_EN,-PG0 diff --git a/ports/stm32/boards/ARDUINO_NICLA_VISION/stm32h7xx_hal_conf.h b/ports/stm32/boards/ARDUINO_NICLA_VISION/stm32h7xx_hal_conf.h index dd71ad71b9..0175f66b70 100644 --- a/ports/stm32/boards/ARDUINO_NICLA_VISION/stm32h7xx_hal_conf.h +++ b/ports/stm32/boards/ARDUINO_NICLA_VISION/stm32h7xx_hal_conf.h @@ -14,8 +14,6 @@ #define HSE_STARTUP_TIMEOUT (5000) #define LSE_STARTUP_TIMEOUT (5000) -#define DATA_CACHE_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 #define DATA_CACHE_ENABLE 1 #define INSTRUCTION_CACHE_ENABLE 1 #define PREFETCH_ENABLE 1