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stm32: Add support for STM32N6xx MCUs.
This commit adds preliminary support for ST's new STM32N6xx MCUs. Supported features of this MCU so far are: - basic clock tree initialisation, running at 800MHz - fully working USB - XSPI in memory-mapped mode - machine.Pin - machine.UART - RTC and deepsleep support - SD card - filesystem - ROMFS - WiFi and BLE via cyw43-driver (SDIO backend) Note that the N6 does not have internal flash, and has some tricky boot sequence, so using a custom bootloader (mboot) is almost a necessity. Signed-off-by: Damien George <damien@micropython.org>
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@@ -137,18 +137,26 @@ static inline void mpu_config_end(uint32_t irq_state) {
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enable_irq(irq_state);
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}
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#elif defined(STM32H5)
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#elif defined(STM32H5) || defined(STM32N6)
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#define MPU_REGION_SIG (MPU_REGION_NUMBER0)
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#define MPU_REGION_ETH (MPU_REGION_NUMBER1)
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#define MPU_REGION_LAST_USED (MPU_REGION_NUMBER1)
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#define MPU_REGION_DMA_UNCACHED_1 (MPU_REGION_NUMBER2)
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#define MPU_REGION_DMA_UNCACHED_2 (MPU_REGION_NUMBER3)
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#define MPU_REGION_LAST_USED (MPU_REGION_NUMBER3)
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#define ST_DEVICE_SIGNATURE_BASE (0x08fff800)
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#define ST_DEVICE_SIGNATURE_LIMIT (0x08ffffff)
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// STM32H5 Cortex-M33 MPU works differently from older cores.
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// Macro only takes region size in bytes, Attributes are coded in mpu_config_region().
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#define MPU_CONFIG_DISABLE (0)
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#define MPU_CONFIG_ETH(size) (size)
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#define MPU_CONFIG_UNCACHED(size) (size)
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#if defined(STM32N6)
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#define MPU_REGION_SIZE_32B (32)
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#endif
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static inline void mpu_init(void) {
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// Configure attribute 0, inner-outer non-cacheable (=0x44).
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@@ -180,8 +188,12 @@ static inline uint32_t mpu_config_start(void) {
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}
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static inline void mpu_config_region(uint32_t region, uint32_t base_addr, uint32_t size) {
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if (region == MPU_REGION_ETH) {
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// Configure region 1 to make DMA memory non-cacheable.
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if (size == 0) {
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// Disable MPU for this region.
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MPU->RNR = region;
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MPU->RLAR &= ~MPU_RLAR_EN_Msk;
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} else if (region == MPU_REGION_ETH || region == MPU_REGION_DMA_UNCACHED_1 || region == MPU_REGION_DMA_UNCACHED_2) {
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// Configure region to make DMA memory non-cacheable.
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__DMB();
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// Configure attribute 1, inner-outer non-cacheable (=0x44).
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