From ec9ea97413c6091c101c3ab10207ae4daf1c56db Mon Sep 17 00:00:00 2001 From: Yuuki NAGAO Date: Sat, 1 Jul 2023 10:25:18 +0900 Subject: [PATCH] stm32/dac: Fix dac.write_timed on G4 MCUs to use 32-bit DMA access. For STMG4 MCUs, the peripheral registers for DAC have to be accessed by words (32bits) because DAC is connected to AHB directly. (This requirement is also there for other MCU series. However, if DAC is connected to APB like F4/L1/L4 MCUs, AHB byte or half-word transfer is changed into a 32-bit APB transfer. This means that PSIZE does not have to be DMA_PDATAALIGN_WORD on these MCUs, and in fact must be BYTE/HALFWORD to function correctly.) Fixes issue #9563. Signed-off-by: Yuuki NAGAO --- ports/stm32/dac.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/ports/stm32/dac.c b/ports/stm32/dac.c index e44e519b63..7a446854f8 100644 --- a/ports/stm32/dac.c +++ b/ports/stm32/dac.c @@ -170,9 +170,19 @@ STATIC void dac_start(uint32_t dac_channel) { STATIC void dac_start_dma(uint32_t dac_channel, const dma_descr_t *dma_descr, uint32_t dma_mode, uint32_t bit_size, uint32_t dac_align, size_t len, void *buf) { uint32_t dma_align; if (bit_size == 8) { + #if defined(STM32G4) + // For STM32G4, DAC registers have to be accessed by words (32-bit). + dma_align = DMA_MDATAALIGN_BYTE | DMA_PDATAALIGN_WORD; + #else dma_align = DMA_MDATAALIGN_BYTE | DMA_PDATAALIGN_BYTE; + #endif } else { + #if defined(STM32G4) + // For STM32G4, DAC registers have to be accessed by words (32-bit). + dma_align = DMA_MDATAALIGN_HALFWORD | DMA_PDATAALIGN_WORD; + #else dma_align = DMA_MDATAALIGN_HALFWORD | DMA_PDATAALIGN_HALFWORD; + #endif } uint32_t base;