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15 Commits
| Author | SHA1 | Message | Date | |
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b7d7a26c8f |
py/emitinlinextensa: Refactor handling of selected narrow opcodes.
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This commit migrates handling of certain narrow (ie. 16-bits) opcodes from a per-opcode dedicated code snippet to the existing table-driven opcode handler. The final ESP8266 firmware binary is 64 bytes shorter, without any change in the existing behaviour and with a reduced source code lines count too. Signed-off-by: Alessandro Gatti <a.gatti@frob.it> |
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9dcad25de6 |
py/emitinlinextensa: Add inline assembler support for windowed cores.
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This commit introduces support for writing inline assembler code snippets when targeting Xtensa cores that use register windows (eg. the whole ESP32 family). Opcodes support is still limited to what the ESP8266 supports (as in, LX3 cores opcodes), however each LX core version is guaranteed to support all previous versions' opcodes as well. The ESP32 does not have the inline assembler enabled by default, following the existing expectations when it comes to firmware footprint. Since now emitted functions may have one of two possible exit sequences, the L32I test had to be fixed. It would return the word containing the L32I opcode itself, but the upper 8 bits of the word came from the following opcode - which can change depending on the exit code sequence. Signed-off-by: Alessandro Gatti <a.gatti@frob.it> |
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b2073a09eb |
py/emitinlinextensa: Refactor handling of selected opcodes.
This commit refactors handling of opcodes whose composition can be easily defined as an entry in a table, so there's only one bit of code handling those opcodes rather than several small bits with overlapping functionalities. Two opcodes, RER and WER have been added to that table for completeness, although they're gated behind the uncommon opcodes configuration define. Still, despite two new opcodes, the final binary is smaller by about 160 bytes. Signed-off-by: Alessandro Gatti <a.gatti@frob.it> |
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1006ed69f0 |
py/emitinlinextensa: Add the rest of LX3 opcodes to the assembler.
This commit expands the Xtensa inline assembler to support most if not all opcodes available on the ESP8266 and LX3 Xtensa cores. This is meant as a stepping stone to add inline assembler support for the ESP32 and its LX6 core, along to windowed-specific opcodes and additional opcodes that are present only on the LX7 core (ESP32-S3 and later). New opcodes being added are covered by tests, and the provided tests were expanded to also include opcodes available in the existing implementation. Given that the ESP8266 space requirements are tighter than ESP32's, certain opcodes that won't be commonly used have been put behind a define to save some space in the general use case. Signed-off-by: Alessandro Gatti <a.gatti@frob.it> |
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50fab08e6b |
py/emitinlinextensa: Simplify register name lookup.
This commit changes the Xtensa inline assembly parser to use a slightly simpler (and probably a tiny bit more efficient) way to look up register names when decoding instruction parameters. Signed-off-by: Alessandro Gatti <a.gatti@frob.it> |
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decf8e6a8b |
all: Remove the "STATIC" macro and just use "static" instead.
The STATIC macro was introduced a very long time ago in commit
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fdd6fa389e |
py: Use unsigned comparison of chars.
On x86 chars are signed, but we're comparing a char to '0' + unsigned int, which is promoted to an unsigned int. Let's promote the char to unsigned before doing the comparison to avoid weird corner cases. |
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def76fe4d9 | all: Use MP_ERROR_TEXT for all error messages. | ||
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69661f3343 |
all: Reformat C and Python source code with tools/codeformat.py.
This is run with uncrustify 0.70.1, and black 19.10b0. |
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55fcb83a42 | py/compile: Support multiple inline asm emitters. | ||
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b01f66c5f1 | py: Shorten error messages by using contractions and some rewording. | ||
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e920bab976 |
py/emitinline: Move common code for end of final pass to compiler.
This patch moves some common code from the individual inline assemblers to the compiler, the code that calls the emit-glue to assign the machine code to the functions scope. |
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dd53b12193 |
py/emitinline: Move inline-asm align and data methods to compiler.
These are generic methods that don't depend on the architecture and so can be handled directly by the compiler. |
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a7fd786a1f |
py/emitinline: Embed entire asm struct instead of a pointer to it.
This reduces fragmentation, and memory use by 1 word. But more importantly it means the emit_inline_asm_t struct now "derives" from mp_asm_base. |
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f76b1bfa9f |
py: Add inline Xtensa assembler.
This patch adds the MICROPY_EMIT_INLINE_XTENSA option, which, when
enabled, allows the @micropython.asm_xtensa decorator to be used.
The following opcodes are currently supported (ax is a register, a0-a15):
ret_n()
callx0(ax)
j(label)
jx(ax)
beqz(ax, label)
bnez(ax, label)
mov(ax, ay)
movi(ax, imm) # imm can be full 32-bit, uses l32r if needed
and_(ax, ay, az)
or_(ax, ay, az)
xor(ax, ay, az)
add(ax, ay, az)
sub(ax, ay, az)
mull(ax, ay, az)
l8ui(ax, ay, imm)
l16ui(ax, ay, imm)
l32i(ax, ay, imm)
s8i(ax, ay, imm)
s16i(ax, ay, imm)
s32i(ax, ay, imm)
l16si(ax, ay, imm)
addi(ax, ay, imm)
ball(ax, ay, label)
bany(ax, ay, label)
bbc(ax, ay, label)
bbs(ax, ay, label)
beq(ax, ay, label)
bge(ax, ay, label)
bgeu(ax, ay, label)
blt(ax, ay, label)
bnall(ax, ay, label)
bne(ax, ay, label)
bnone(ax, ay, label)
Upon entry to the assembly function the registers a0, a12, a13, a14 are
pushed to the stack and the stack pointer (a1) decreased by 16. Upon
exit, these registers and the stack pointer are restored, and ret.n is
executed to return to the caller (caller address is in a0).
Note that the ABI for the Xtensa emitters is non-windowing.
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