3 Commits

Author SHA1 Message Date
Alessandro Gatti
cb9d8fcc31 tests/run-tests.py: Discover RV32 extension inlineasm tests.
This commit extends the test runner to automatically discover inline
assembler tests for known RV32 extensions, and checks whether to add the
discovered tests to the enabled tests list.

Automatic discovery requires that inline assembler tests for RV32
extensions follow a specific pattern both for filenames and for the
tests' output in case of success.  A valid RV32 extension test must
have:

  * A code fragment that checks for support of the extension on the
    running target in "/tests/feature_check", called
    "inlineasm_rv32_<extensionname>.py" that should print the string
    "rv32_<extensionname>" if the extension is supported
  * A matching expected result file in "/tests/feature_check" called
    "inlineasm_rv32_<extensionname>.py.exp" that must contain the string
    "rv32_<extensionname>" (without quotes)
  * A regular MicroPython test file in "/tests/inlineasm/rv32" called
    "asm_ext_<extensionname>.py"

For example, to test the Zba extension, there must be a file called
"/tests/feature_check/inlineasm_rv32_zba.py" that should print the
string "rv32_zba" if the extension is supported, together with a file
called "/test/feature_check/inlineasm_rv32_zba.py.exp" that contains the
string "rv32_zba" in it, and finally there must be a regular MicroPython
test file called "/tests/inlineasm/rv32/asm_ext_zba.py".

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2025-12-19 17:06:53 +11:00
Alessandro Gatti
40dbf77415 py/emitinlinerv32: Add Zba opcodes to the inline assembler.
This commit adds support for Zba opcodes to the RV32 inline assembler.

Three new opcodes were added, SH1ADD, SH2ADD, and SH3ADD, which performs
a scaled addition (by 1, 2, or 3 bits respectively).  At the moment only
qemu's VIRT_RV32 and rp2's RPI_PICO2/RPI_PICO2_W ports support these
opcodes (the latter only when using the RISCV variant).

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2025-09-19 15:52:20 +02:00
Alessandro Gatti
268acb714d py/emitinlinerv32: Add inline assembler support for RV32.
This commit adds support for writing inline assembler functions when
targeting a RV32IMC processor.

Given that this takes up a bit of rodata space due to its large
instruction decoding table and its extensive error messages, it is
enabled by default only on offline targets such as mpy-cross and the
qemu port.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2025-01-02 11:49:10 +11:00