Jeff Epler
36ab1c2640
ports: Remove unneeded future imports.
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Signed-off-by: Jeff Epler <jepler@unpythonic.net >
2025-09-15 14:54:09 +10:00
Jeff Epler
f0c6f16b9e
all: Remove Python 2.7 support.
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Python 2.7 has been EOL since January 2020.
Ubuntu oldoldlts (Focal Fossa, 20.04) has Python 3.8. Debian oldoldstable
(Buster, from 2019) has Python 3.7. RHEL 8 (from 2019) has Python 3.6.
It's easier than ever to install a modern Python using uv.
Given this, it seems like a fine idea to drop Python 2.7 support.
Even though the build is not tested on Python as old as 3.3, I left
comments stating that "3.3+" is the baseline Python version. However, it
might make sense to bump this to e.g., 3.10, the oldest Python 3 version
used during CI. Or, using uv or another method actually test on the oldest
Python interpreter that is desirable to support (uv goes back to Python 3.7
easily; in October 2025, the oldest supported Python interpreter version
will be 3.10)
Signed-off-by: Jeff Epler <jepler@gmail.com >
2025-09-15 14:53:32 +10:00
Damien George
eb3ea9ee13
stm32: Add support for STM32N6xx MCUs.
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This commit adds preliminary support for ST's new STM32N6xx MCUs.
Supported features of this MCU so far are:
- basic clock tree initialisation, running at 800MHz
- fully working USB
- XSPI in memory-mapped mode
- machine.Pin
- machine.UART
- RTC and deepsleep support
- SD card
- filesystem
- ROMFS
- WiFi and BLE via cyw43-driver (SDIO backend)
Note that the N6 does not have internal flash, and has some tricky boot
sequence, so using a custom bootloader (mboot) is almost a necessity.
Signed-off-by: Damien George <damien@micropython.org >
2025-07-08 16:24:27 +10:00
Damien George
3c1722e705
stm32: Fix extraction of hse/hsi/pllm values from preprocessed source.
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The expressions for the `micropy_hw_hse_value` etc variables may contain
parenthesis, eg `micropy_hw_hse_value = ((25) * 1000000)`. To handle such
a case, simplify the regex and always use `eval(found)` to evaluate the
expression.
Signed-off-by: Damien George <damien@micropython.org >
2024-12-19 00:55:31 +11:00
Andrew Leech
7924b31050
stm32: Generate PLL tables from pre-processed headers.
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Allows boards to configure their HSE and PLL values in variants.
Signed-off-by: Andrew Leech <andrew@alelec.net >
2024-12-18 16:55:53 +11:00
Damien George
971f1cf987
stm32/powerctrl: Add support for frequency scaling with HSI on H5 MCUs.
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Signed-off-by: Damien George <damien@micropython.org >
2023-10-17 12:41:47 +11:00
Christian Clauss
4376c969f6
all: Fix Python comparison to None and True, and use "not in".
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These are basic PEP8 recommendations.
2023-03-10 13:32:24 +11:00
Damien George
6e0f9b9262
stm32/boards/pllvalues.py: Support wider range of PLL values for F413.
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Signed-off-by: Damien George <damien@micropython.org >
2021-04-20 23:33:33 +10:00
Damien George
cb396827f5
stm32/boards/pllvalues.py: Relax PLLQ constraints on STM32F413 MCUs.
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Signed-off-by: Damien George <damien@micropython.org >
2021-04-07 12:47:21 +10:00
Damien George
69661f3343
all: Reformat C and Python source code with tools/codeformat.py.
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This is run with uncrustify 0.70.1, and black 19.10b0.
2020-02-28 10:33:03 +11:00
Damien George
2c8c2b935e
stm32/powerctrl: Improve support for changing system freq on H7 MCUs.
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This commit improves pllvalues.py to generate PLL values for H7 MCUs that
are valid (VCO in and out are in range) and extend for the entire range of
SYSCLK values up to 400MHz (up to 480MHz is currently unsupported).
2020-01-31 23:25:18 +11:00
Damien George
89ebb3325b
stm32/boards/pllvalues.py: Support HSx_VALUE defined without uint32_t.
2019-06-25 14:18:24 +10:00
Damien George
34cae24e30
stm32/boards/pllvalues.py: Search nested headers for HSx_VALUE defines.
2019-05-31 21:44:53 +10:00
Damien George
3fbf32b947
stm32/powerctrl: Support changing frequency when HSI is clock source.
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This patch makes pllvalues.py generate two tables: one for when HSI is used
and one for when HSE is used. The correct table is then selected at
compile time via the existing MICROPY_HW_CLK_USE_HSI.
2019-05-02 13:00:00 +10:00
Damien George
47550ef2cd
stm32: For MCUs that have PLLSAI allow to set SYSCLK at 2MHz increments.
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MCUs that have a PLLSAI can use it to generate a 48MHz clock for USB, SDIO
and RNG peripherals. In such cases the SYSCLK is not restricted to values
that allow the system PLL to generate 48MHz, but can be any frequency.
This patch allows such configurability for F7 MCUs, allowing the SYSCLK to
be set in 2MHz increments via machine.freq(). PLLSAI will only be enabled
if needed, and consumes about 1mA extra. This fine grained control of
frequency is useful to get accurate SPI baudrates, for example.
2018-09-11 16:42:57 +10:00
Damien George
01dd7804b8
ports: Make new ports/ sub-directory and move all ports there.
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This is to keep the top-level directory clean, to make it clear what is
core and what is a port, and to allow the repository to grow with new ports
in a sustainable way.
2017-09-06 13:40:51 +10:00
