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92f056d58f
The byte order (endianness) seems to be swapped when read in 8D-8D-8D in XIP mode, for most flashes, with the exception of MX which seems to swap half-words. This commit adds a flash setting to allow parts to enable half-word swap when data is written, to fix this issue. By default, only endianness is fixed. Tested with both MX and ISSI parts on AE3, flash test and simple file write/read. Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
105 lines
3.6 KiB
C
105 lines
3.6 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2024 OpenMV LLC.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef MICROPY_INCLUDED_ALIF_OSPI_FLASH_H
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#define MICROPY_INCLUDED_ALIF_OSPI_FLASH_H
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#include "py/mphal.h"
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#include "ospi_flash_settings.h"
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// Format of command, address and data phases.
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enum {
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OSPI_FLASH_OCTAL_MODE_SSS,
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OSPI_FLASH_OCTAL_MODE_SDD,
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OSPI_FLASH_OCTAL_MODE_DDD,
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};
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struct _ospi_flash_t;
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typedef struct _ospi_pin_settings_t {
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uint32_t peripheral_number;
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const mp_hal_pin_obj_t pin_reset;
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const mp_hal_pin_obj_t pin_cs;
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const mp_hal_pin_obj_t pin_clk_p;
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const mp_hal_pin_obj_t pin_clk_n;
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const mp_hal_pin_obj_t pin_rwds;
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const mp_hal_pin_obj_t pin_d0;
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const mp_hal_pin_obj_t pin_d1;
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const mp_hal_pin_obj_t pin_d2;
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const mp_hal_pin_obj_t pin_d3;
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const mp_hal_pin_obj_t pin_d4;
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const mp_hal_pin_obj_t pin_d5;
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const mp_hal_pin_obj_t pin_d6;
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const mp_hal_pin_obj_t pin_d7;
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} ospi_pin_settings_t;
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typedef struct _ospi_flash_settings_t {
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uint32_t jedec_id;
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uint32_t freq_hz;
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int (*flash_init)(struct _ospi_flash_t *);
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uint8_t octal_mode;
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bool rxds;
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bool bswap16;
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uint8_t inst_len;
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uint8_t xip_data_len;
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uint16_t read_sr;
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uint8_t read_sr_dummy_cycles;
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uint16_t read_id;
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uint8_t read_id_dummy_cycles;
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uint16_t write_en;
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uint16_t read_command;
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uint8_t read_dummy_cycles;
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uint16_t write_command;
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uint16_t erase_command;
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} ospi_flash_settings_t;
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// Provided by the board when it enables OSPI.
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extern const ospi_pin_settings_t ospi_pin_settings;
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extern const ospi_flash_settings_t ospi_flash_settings[];
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extern const size_t ospi_flash_settings_len;
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// Functions specific to ISSI flash chips.
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int ospi_flash_issi_init(struct _ospi_flash_t *self);
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// Functions specific to MX flash chips.
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int ospi_flash_mx_init(struct _ospi_flash_t *self);
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uint8_t ospi_flash_mx_read_cr(struct _ospi_flash_t *self);
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uint8_t ospi_flash_mx_read_cr2(struct _ospi_flash_t *self, uint32_t addr);
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int ospi_flash_mx_write_cr(struct _ospi_flash_t *self, uint8_t value);
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int ospi_flash_mx_write_cr2(struct _ospi_flash_t *self, uint32_t addr, uint8_t value);
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// XIP control
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int ospi_flash_xip_enter(struct _ospi_flash_t *self);
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int ospi_flash_xip_exit(struct _ospi_flash_t *self);
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// SPI flash interface.
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int ospi_flash_init(void);
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uintptr_t ospi_flash_get_xip_base(void);
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int ospi_flash_erase_sector(uint32_t addr);
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int ospi_flash_read(uint32_t addr, uint32_t len, uint8_t *dest);
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int ospi_flash_write(uint32_t addr, uint32_t len, const uint8_t *src);
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#endif // MICROPY_INCLUDED_ALIF_OSPI_FLASH_H
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