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d00eab4a30
This means the fix from dd1465e7 will also apply to stm32 and mimxrt ports that use CYW43. This work was funded through GitHub Sponsors. Signed-off-by: Angus Gratton <angus@redyak.com.au>
107 lines
3.9 KiB
C
107 lines
3.9 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2022 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef MICROPY_INCLUDED_RP2_CYW43_CONFIGPORT_H
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#define MICROPY_INCLUDED_RP2_CYW43_CONFIGPORT_H
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#include "extmod/cyw43_config_common.h"
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#define CYW43_INCLUDE_LEGACY_F1_OVERFLOW_WORKAROUND_VARIABLES (1)
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#define CYW43_WIFI_NVRAM_INCLUDE_FILE "wifi_nvram_43439.h"
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#define CYW43_SLEEP_MAX (10) // Unclear why rp2 port overrides the default here
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#define CYW43_USE_OTP_MAC (1)
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static inline bool cyw43_poll_is_pending(void) {
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return pendsv_is_pending(PENDSV_DISPATCH_CYW43);
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}
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static inline void cyw43_yield(void) {
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if (!cyw43_poll_is_pending()) {
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best_effort_wfe_or_timeout(make_timeout_time_ms(1));
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}
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}
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#define CYW43_POST_POLL_HOOK cyw43_post_poll_hook();
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// set in SDK board header
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#define CYW43_NUM_GPIOS CYW43_WL_GPIO_COUNT
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#if CYW43_PIN_WL_DYNAMIC
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// Dynamic pins can be changed at runtime before initialising the CYW43
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typedef enum cyw43_pin_index_t {
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CYW43_PIN_INDEX_WL_REG_ON,
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CYW43_PIN_INDEX_WL_DATA_OUT,
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CYW43_PIN_INDEX_WL_DATA_IN,
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CYW43_PIN_INDEX_WL_HOST_WAKE,
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CYW43_PIN_INDEX_WL_CLOCK,
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CYW43_PIN_INDEX_WL_CS,
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CYW43_PIN_INDEX_WL_COUNT // last
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} cyw43_pin_index_t;
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// Function to retrieve a cyw43 dynamic pin
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uint cyw43_get_pin_wl(cyw43_pin_index_t pin_id);
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#define CYW43_PIN_WL_REG_ON cyw43_get_pin_wl(CYW43_PIN_INDEX_WL_REG_ON)
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#define CYW43_PIN_WL_DATA_OUT cyw43_get_pin_wl(CYW43_PIN_INDEX_WL_DATA_OUT)
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#define CYW43_PIN_WL_DATA_IN cyw43_get_pin_wl(CYW43_PIN_INDEX_WL_DATA_IN)
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#define CYW43_PIN_WL_HOST_WAKE cyw43_get_pin_wl(CYW43_PIN_INDEX_WL_HOST_WAKE)
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#define CYW43_PIN_WL_CLOCK cyw43_get_pin_wl(CYW43_PIN_INDEX_WL_CLOCK)
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#define CYW43_PIN_WL_CS cyw43_get_pin_wl(CYW43_PIN_INDEX_WL_CS)
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#else
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#define CYW43_PIN_WL_REG_ON CYW43_DEFAULT_PIN_WL_REG_ON
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#define CYW43_PIN_WL_DATA_OUT CYW43_DEFAULT_PIN_WL_DATA_OUT
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#define CYW43_PIN_WL_DATA_IN CYW43_DEFAULT_PIN_WL_DATA_IN
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#define CYW43_PIN_WL_HOST_WAKE CYW43_DEFAULT_PIN_WL_HOST_WAKE
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#define CYW43_PIN_WL_CLOCK CYW43_DEFAULT_PIN_WL_CLOCK
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#define CYW43_PIN_WL_CS CYW43_DEFAULT_PIN_WL_CS
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#endif
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#define CYW43_SDPCM_SEND_COMMON_WAIT \
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if (get_core_num() == 0) { \
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cyw43_yield(); \
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} \
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#define CYW43_DO_IOCTL_WAIT \
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if (get_core_num() == 0) { \
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cyw43_yield(); \
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} \
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// Bluetooth requires dynamic memory allocation to load its firmware (the allocation
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// call is made from pico-sdk). This allocation is always done at thread-level, not
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// from an IRQ, so is safe to delegate to the MicroPython GC heap.
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#ifndef cyw43_malloc
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#define cyw43_malloc(nmemb) m_tracked_calloc(nmemb, 1)
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#endif
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#ifndef cyw43_free
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#define cyw43_free m_tracked_free
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#endif
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#endif // MICROPY_INCLUDED_RP2_CYW43_CONFIGPORT_H
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