Alessandro Gatti 9da627f9a0 py/emitinlinerv32: Add Zcmp opcodes to the inline assembler. ...

This commit adds support for Zcmp opcodes to the RV32 inline assembler.

Five new opcodes were added: CM.PUSH, CM.POP, CM.POPRET, CM.POPRETZ,
CM.MVA01S, and CM.MVSA01, which introduce multi-register push and pop
(similar to Thumb's PUSH and POP opcodes) and shortcuts to swap
registers A0 and A1 with two chosen S-registers.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>

2026-05-12 00:44:15 +02:00

..

rv32

py/emitinlinerv32: Add Zcmp opcodes to the inline assembler.

2026-05-12 00:44:15 +02:00

thumb

py/emitinlinethumb: Shrink condition code lookups.

2026-04-15 15:35:27 +10:00

xtensa

py/emitinlinextensa: Add inline assembler support for windowed cores.

2026-02-07 18:36:22 +11:00