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This commit migrates handling of certain narrow (ie. 16-bits) opcodes from a per-opcode dedicated code snippet to the existing table-driven opcode handler. The final ESP8266 firmware binary is 64 bytes shorter, without any change in the existing behaviour and with a reduced source code lines count too. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
490 lines
21 KiB
C
490 lines
21 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2013-2016 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include <stdarg.h>
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#include <assert.h>
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#include "py/emit.h"
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#include "py/asmxtensa.h"
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#if MICROPY_EMIT_INLINE_XTENSA
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#include "py/persistentcode.h"
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static inline bool emit_windowed_code() {
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#if MICROPY_DYNAMIC_COMPILER
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return mp_dynamic_compiler.native_arch == MP_NATIVE_ARCH_XTENSAWIN;
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#elif MICROPY_EMIT_XTENSAWIN
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return true;
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#else
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return false;
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#endif
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}
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struct _emit_inline_asm_t {
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asm_xtensa_t as;
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uint16_t pass;
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mp_obj_t *error_slot;
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mp_uint_t max_num_labels;
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qstr *label_lookup;
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};
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static void emit_inline_xtensa_error_msg(emit_inline_asm_t *emit, mp_rom_error_text_t msg) {
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*emit->error_slot = mp_obj_new_exception_msg(&mp_type_SyntaxError, msg);
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}
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static void emit_inline_xtensa_error_exc(emit_inline_asm_t *emit, mp_obj_t exc) {
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*emit->error_slot = exc;
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}
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emit_inline_asm_t *emit_inline_xtensa_new(mp_uint_t max_num_labels) {
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emit_inline_asm_t *emit = m_new_obj(emit_inline_asm_t);
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memset(&emit->as, 0, sizeof(emit->as));
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mp_asm_base_init(&emit->as.base, max_num_labels);
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emit->max_num_labels = max_num_labels;
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emit->label_lookup = m_new(qstr, max_num_labels);
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return emit;
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}
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void emit_inline_xtensa_free(emit_inline_asm_t *emit) {
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m_del(qstr, emit->label_lookup, emit->max_num_labels);
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mp_asm_base_deinit(&emit->as.base, false);
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m_del_obj(emit_inline_asm_t, emit);
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}
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static void emit_inline_xtensa_start_pass(emit_inline_asm_t *emit, pass_kind_t pass, mp_obj_t *error_slot) {
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emit->pass = pass;
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emit->error_slot = error_slot;
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if (emit->pass == MP_PASS_CODE_SIZE) {
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memset(emit->label_lookup, 0, emit->max_num_labels * sizeof(qstr));
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}
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mp_asm_base_start_pass(&emit->as.base, pass == MP_PASS_EMIT ? MP_ASM_PASS_EMIT : MP_ASM_PASS_COMPUTE);
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if (emit_windowed_code()) {
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asm_xtensa_entry_win(&emit->as, 0);
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} else {
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asm_xtensa_entry(&emit->as, 0);
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}
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}
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static void emit_inline_xtensa_end_pass(emit_inline_asm_t *emit, mp_uint_t type_sig) {
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if (emit_windowed_code()) {
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asm_xtensa_exit_win(&emit->as);
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} else {
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asm_xtensa_exit(&emit->as);
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}
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asm_xtensa_end_pass(&emit->as);
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}
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static mp_uint_t emit_inline_xtensa_count_params(emit_inline_asm_t *emit, mp_uint_t n_params, mp_parse_node_t *pn_params) {
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if (n_params > 4) {
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emit_inline_xtensa_error_msg(emit, MP_ERROR_TEXT("can only have up to 4 parameters to Xtensa assembly"));
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return 0;
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}
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for (mp_uint_t i = 0; i < n_params; i++) {
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if (!MP_PARSE_NODE_IS_ID(pn_params[i])) {
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emit_inline_xtensa_error_msg(emit, MP_ERROR_TEXT("parameters must be registers in sequence a2 to a5"));
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return 0;
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}
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const char *p = qstr_str(MP_PARSE_NODE_LEAF_ARG(pn_params[i]));
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if (!(strlen(p) == 2 && p[0] == 'a' && (mp_uint_t)p[1] == '2' + i)) {
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emit_inline_xtensa_error_msg(emit, MP_ERROR_TEXT("parameters must be registers in sequence a2 to a5"));
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return 0;
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}
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}
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return n_params;
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}
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static bool emit_inline_xtensa_label(emit_inline_asm_t *emit, mp_uint_t label_num, qstr label_id) {
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assert(label_num < emit->max_num_labels);
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if (emit->pass == MP_PASS_CODE_SIZE) {
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// check for duplicate label on first pass
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for (uint i = 0; i < emit->max_num_labels; i++) {
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if (emit->label_lookup[i] == label_id) {
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return false;
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}
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}
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}
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emit->label_lookup[label_num] = label_id;
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mp_asm_base_label_assign(&emit->as.base, label_num);
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return true;
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}
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static const qstr_short_t REGISTERS[16] = {
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MP_QSTR_a0, MP_QSTR_a1, MP_QSTR_a2, MP_QSTR_a3, MP_QSTR_a4, MP_QSTR_a5, MP_QSTR_a6, MP_QSTR_a7,
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MP_QSTR_a8, MP_QSTR_a9, MP_QSTR_a10, MP_QSTR_a11, MP_QSTR_a12, MP_QSTR_a13, MP_QSTR_a14, MP_QSTR_a15
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};
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static mp_uint_t get_arg_reg(emit_inline_asm_t *emit, const char *op, mp_parse_node_t pn) {
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if (MP_PARSE_NODE_IS_ID(pn)) {
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qstr node_qstr = MP_PARSE_NODE_LEAF_ARG(pn);
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for (size_t i = 0; i < MP_ARRAY_SIZE(REGISTERS); i++) {
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if (node_qstr == REGISTERS[i]) {
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return i;
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}
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}
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}
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emit_inline_xtensa_error_exc(emit,
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mp_obj_new_exception_msg_varg(&mp_type_SyntaxError,
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MP_ERROR_TEXT("'%s' expects a register"), op));
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return 0;
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}
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static uint32_t get_arg_i(emit_inline_asm_t *emit, const char *op, mp_parse_node_t pn, int min, int max) {
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mp_obj_t o;
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if (!mp_parse_node_get_int_maybe(pn, &o)) {
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emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("'%s' expects an integer"), op));
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return 0;
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}
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uint32_t i = mp_obj_get_int_truncated(o);
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if (min != max && ((int)i < min || (int)i > max)) {
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emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("'%s' integer %d isn't within range %d..%d"), op, i, min, max));
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return 0;
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}
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return i;
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}
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static int get_arg_label(emit_inline_asm_t *emit, const char *op, mp_parse_node_t pn) {
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if (!MP_PARSE_NODE_IS_ID(pn)) {
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emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("'%s' expects a label"), op));
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return 0;
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}
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qstr label_qstr = MP_PARSE_NODE_LEAF_ARG(pn);
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for (uint i = 0; i < emit->max_num_labels; i++) {
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if (emit->label_lookup[i] == label_qstr) {
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return i;
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}
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}
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// only need to have the labels on the last pass
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if (emit->pass == MP_PASS_EMIT) {
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emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("label '%q' not defined"), label_qstr));
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}
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return 0;
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}
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static const qstr_short_t BRANCH_OPCODE_NAMES[] = {
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MP_QSTR_bnone, MP_QSTR_beq, MP_QSTR_blt, MP_QSTR_bltu, MP_QSTR_ball,
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MP_QSTR_bbc, MP_QSTR_, MP_QSTR_, MP_QSTR_bany, MP_QSTR_bne,
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MP_QSTR_bge, MP_QSTR_bgeu, MP_QSTR_bnall, MP_QSTR_bbs,
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};
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#define RRR_R0 (1 << 4)
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#define RRR_R1 (2 << 4)
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#define RRR_R2 (3 << 4)
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#define RRR (0)
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#define RRI8 (1)
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#define RRRN (2)
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static const struct opcode_entry_t {
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qstr_short_t name;
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uint16_t operands : 2;
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uint16_t op2 : 4;
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uint16_t op1 : 4;
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uint16_t op0 : 4;
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// 2 bits available here
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uint32_t r : 6;
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uint32_t s : 6;
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uint32_t t : 6;
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uint32_t shift : 3;
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uint32_t kind : 2;
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// 9 bits available here
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} OPCODE_TABLE[] = {
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{ MP_QSTR_abs_, 2, 6, 0, 0, RRR_R0, 1, RRR_R1, 0, RRR },
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{ MP_QSTR_add, 3, 8, 0, 0, RRR_R0, RRR_R1, RRR_R2, 0, RRR },
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{ MP_QSTR_add_n, 3, 0, 0, 10, RRR_R0, RRR_R1, RRR_R2, 0, RRRN },
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{ MP_QSTR_addi, 3, 0, 0, 2, 12, RRR_R1, RRR_R0, 0, RRI8 },
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{ MP_QSTR_addx2, 3, 9, 0, 0, RRR_R0, RRR_R1, RRR_R2, 0, RRR },
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{ MP_QSTR_addx4, 3, 10, 0, 0, RRR_R0, RRR_R1, RRR_R2, 0, RRR },
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{ MP_QSTR_addx8, 3, 11, 0, 0, RRR_R0, RRR_R1, RRR_R2, 0, RRR },
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{ MP_QSTR_and_, 3, 1, 0, 0, RRR_R0, RRR_R1, RRR_R2, 0, RRR },
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{ MP_QSTR_callx0, 1, 0, 0, 0, 0, RRR_R0, 12, 0, RRR },
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{ MP_QSTR_jx, 1, 0, 0, 0, 0, RRR_R0, 10, 0, RRR },
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{ MP_QSTR_l16si, 3, 0, 0, 2, 9, RRR_R1, RRR_R0, 3, RRI8 },
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{ MP_QSTR_l16ui, 3, 0, 0, 2, 1, RRR_R1, RRR_R0, 3, RRI8 },
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{ MP_QSTR_l32i, 3, 0, 0, 2, 2, RRR_R1, RRR_R0, 5, RRI8 },
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{ MP_QSTR_l8ui, 3, 0, 0, 2, 0, RRR_R1, RRR_R0, 1, RRI8 },
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{ MP_QSTR_mov, 2, 0, 0, 13, 0, RRR_R1, RRR_R0, 0, RRRN },
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{ MP_QSTR_mov_n, 2, 0, 0, 13, 0, RRR_R1, RRR_R0, 0, RRRN },
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{ MP_QSTR_mull, 3, 8, 2, 0, RRR_R0, RRR_R1, RRR_R2, 0, RRR },
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{ MP_QSTR_neg, 2, 6, 0, 0, RRR_R0, 0, RRR_R1, 0, RRR },
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{ MP_QSTR_nop, 0, 0, 0, 0, 2, 0, 15, 0, RRR },
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{ MP_QSTR_nop_n, 0, 0, 0, 13, 15, 0, 3, 0, RRRN },
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{ MP_QSTR_nsa, 2, 4, 0, 0, 14, RRR_R1, RRR_R0, 0, RRR },
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{ MP_QSTR_nsau, 2, 4, 0, 0, 15, RRR_R1, RRR_R0, 0, RRR },
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{ MP_QSTR_or_, 3, 2, 0, 0, RRR_R0, RRR_R1, RRR_R2, 0, RRR },
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{ MP_QSTR_ret, 0, 0, 0, 13, 15, 0, 0, 0, RRRN },
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{ MP_QSTR_ret_n, 0, 0, 0, 13, 15, 0, 0, 0, RRRN },
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{ MP_QSTR_s16i, 3, 0, 0, 2, 5, RRR_R1, RRR_R0, 3, RRI8 },
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{ MP_QSTR_s32i, 3, 0, 0, 2, 6, RRR_R1, RRR_R0, 5, RRI8 },
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{ MP_QSTR_s8i, 3, 0, 0, 2, 4, RRR_R1, RRR_R0, 1, RRI8 },
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{ MP_QSTR_sll, 2, 10, 1, 0, RRR_R0, RRR_R1, 0, 0, RRR },
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{ MP_QSTR_sra, 2, 11, 1, 0, RRR_R0, 0, RRR_R1, 0, RRR },
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{ MP_QSTR_src, 3, 8, 1, 0, RRR_R0, RRR_R1, RRR_R2, 0, RRR },
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{ MP_QSTR_srl, 2, 9, 1, 0, RRR_R0, 0, RRR_R1, 0, RRR },
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{ MP_QSTR_ssa8b, 1, 4, 0, 0, 3, RRR_R0, 0, 0, RRR },
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{ MP_QSTR_ssa8l, 1, 4, 0, 0, 2, RRR_R0, 0, 0, RRR },
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{ MP_QSTR_ssl, 1, 4, 0, 0, 1, RRR_R0, 0, 0, RRR },
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{ MP_QSTR_ssr, 1, 4, 0, 0, 0, RRR_R0, 0, 0, RRR },
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{ MP_QSTR_sub, 3, 12, 0, 0, RRR_R0, RRR_R1, RRR_R2, 0, RRR },
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{ MP_QSTR_subx2, 3, 13, 0, 0, RRR_R0, RRR_R1, RRR_R2, 0, RRR },
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{ MP_QSTR_subx4, 3, 14, 0, 0, RRR_R0, RRR_R1, RRR_R2, 0, RRR },
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{ MP_QSTR_subx8, 3, 15, 0, 0, RRR_R0, RRR_R1, RRR_R2, 0, RRR },
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{ MP_QSTR_xor, 3, 3, 0, 0, RRR_R0, RRR_R1, RRR_R2, 0, RRR },
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#if MICROPY_EMIT_INLINE_XTENSA_UNCOMMON_OPCODES
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{ MP_QSTR_dsync, 0, 0, 0, 0, 2, 0, 3, 0, RRR },
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{ MP_QSTR_esync, 0, 0, 0, 0, 2, 0, 2, 0, RRR },
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{ MP_QSTR_extw, 0, 0, 0, 0, 2, 0, 13, 0, RRR },
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{ MP_QSTR_ill, 0, 0, 0, 0, 2, 0, 0, 0, RRR },
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{ MP_QSTR_ill_n, 0, 0, 0, 13, 15, 0, 6, 0, RRRN },
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{ MP_QSTR_isync, 0, 0, 0, 0, 2, 0, 0, 0, RRR },
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{ MP_QSTR_memw, 0, 0, 0, 0, 2, 0, 12, 0, RRR },
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{ MP_QSTR_rer, 2, 4, 0, 0, 6, RRR_R1, RRR_R0, 0, RRR },
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{ MP_QSTR_rsync, 0, 0, 0, 0, 2, 0, 1, 0, RRR },
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{ MP_QSTR_wer, 2, 4, 0, 0, 7, RRR_R1, RRR_R0, 0, RRR },
|
|
#endif
|
|
};
|
|
|
|
// The index of the first four qstrs matches the CCZ condition value to be
|
|
// embedded into the opcode.
|
|
static const qstr_short_t BCCZ_OPCODES[] = {
|
|
MP_QSTR_beqz, MP_QSTR_bnez, MP_QSTR_bltz, MP_QSTR_bgez,
|
|
MP_QSTR_beqz_n, MP_QSTR_bnez_n
|
|
};
|
|
|
|
static void emit_inline_xtensa_op(emit_inline_asm_t *emit, qstr op, mp_uint_t n_args, mp_parse_node_t *pn_args) {
|
|
size_t op_len;
|
|
const char *op_str = (const char *)qstr_data(op, &op_len);
|
|
|
|
for (size_t index = 0; index < MP_ARRAY_SIZE(OPCODE_TABLE); index++) {
|
|
const struct opcode_entry_t *entry = &OPCODE_TABLE[index];
|
|
if (entry->name == op) {
|
|
if (n_args != entry->operands) {
|
|
goto unknown_op;
|
|
}
|
|
|
|
uint32_t opcode = ((entry->r & 0x0F) << 12) | ((entry->s & 0x0F) << 8) | ((entry->t & 0x0F) << 4) | entry->op0;
|
|
if (entry->kind == RRR) {
|
|
opcode |= (entry->op2 << 20) | (entry->op1 << 16);
|
|
} else if (entry->kind == RRI8) {
|
|
int min = 0;
|
|
int max = 0;
|
|
int shift = entry->shift;
|
|
if (shift > 0) {
|
|
shift >>= 1;
|
|
max = 0xFF << shift;
|
|
} else {
|
|
min = -128;
|
|
max = 127;
|
|
}
|
|
uint32_t immediate = get_arg_i(emit, op_str, pn_args[2], min, max);
|
|
opcode |= ((immediate >> shift) & 0xFF) << 16;
|
|
}
|
|
if (entry->r >= RRR_R0) {
|
|
opcode |= get_arg_reg(emit, op_str, pn_args[(entry->r >> 4) - 1]) << 12;
|
|
}
|
|
if (entry->s >= RRR_R0) {
|
|
opcode |= get_arg_reg(emit, op_str, pn_args[(entry->s >> 4) - 1]) << 8;
|
|
}
|
|
if (entry->t >= RRR_R0) {
|
|
opcode |= get_arg_reg(emit, op_str, pn_args[(entry->t >> 4) - 1]) << 4;
|
|
}
|
|
if (entry->kind == RRRN) {
|
|
assert((opcode >> 16) == 0 && "Stray bits in narrow opcode");
|
|
asm_xtensa_op16(&emit->as, (uint16_t)(opcode & 0xFFFF));
|
|
} else {
|
|
asm_xtensa_op24(&emit->as, opcode);
|
|
}
|
|
return;
|
|
}
|
|
}
|
|
|
|
if (n_args == 1) {
|
|
if (op == MP_QSTR_j) {
|
|
int label = get_arg_label(emit, op_str, pn_args[0]);
|
|
asm_xtensa_j_label(&emit->as, label);
|
|
} else if (op == MP_QSTR_ssai) {
|
|
mp_uint_t sa = get_arg_i(emit, op_str, pn_args[0], 0, 31);
|
|
asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRR(0, 0, 4, 4, sa & 0x0F, (sa >> 4) & 0x01));
|
|
} else if (op == MP_QSTR_call0) {
|
|
mp_uint_t label = get_arg_label(emit, op_str, pn_args[0]);
|
|
asm_xtensa_call0(&emit->as, label);
|
|
#if MICROPY_EMIT_INLINE_XTENSA_UNCOMMON_OPCODES
|
|
} else if (op == MP_QSTR_fsync) {
|
|
mp_uint_t imm3 = get_arg_i(emit, op_str, pn_args[0], 0, 7);
|
|
asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRR(0, 0, 0, 2, 8 | imm3, 0));
|
|
#endif
|
|
} else {
|
|
goto unknown_op;
|
|
}
|
|
} else if (n_args == 2) {
|
|
uint r0 = get_arg_reg(emit, op_str, pn_args[0]);
|
|
for (size_t index = 0; index < MP_ARRAY_SIZE(BCCZ_OPCODES); index++) {
|
|
if (op == BCCZ_OPCODES[index]) {
|
|
mp_uint_t label = get_arg_label(emit, op_str, pn_args[1]);
|
|
asm_xtensa_bccz_reg_label(&emit->as, index & 0x03, r0, label);
|
|
return;
|
|
}
|
|
}
|
|
if (op == MP_QSTR_movi) {
|
|
// for convenience we emit l32r if the integer doesn't fit in movi
|
|
uint32_t imm = get_arg_i(emit, op_str, pn_args[1], 0, 0);
|
|
asm_xtensa_mov_reg_i32(&emit->as, r0, imm);
|
|
} else if (op == MP_QSTR_l32r) {
|
|
mp_uint_t label = get_arg_label(emit, op_str, pn_args[1]);
|
|
asm_xtensa_l32r(&emit->as, r0, label);
|
|
} else if (op == MP_QSTR_movi_n) {
|
|
mp_int_t imm = get_arg_i(emit, op_str, pn_args[1], -32, 95);
|
|
asm_xtensa_op_movi_n(&emit->as, r0, imm);
|
|
} else
|
|
#if MICROPY_EMIT_INLINE_XTENSA_UNCOMMON_OPCODES
|
|
if (op == MP_QSTR_rsr) {
|
|
mp_uint_t sr = get_arg_i(emit, op_str, pn_args[1], 0, 255);
|
|
asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RSR(0, 3, 0, sr, r0));
|
|
} else if (op == MP_QSTR_rur) {
|
|
mp_uint_t imm8 = get_arg_i(emit, op_str, pn_args[1], 0, 255);
|
|
asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRR(0, 3, 14, r0, (imm8 >> 4) & 0x0F, imm8 & 0x0F));
|
|
} else if (op == MP_QSTR_wsr) {
|
|
mp_uint_t sr = get_arg_i(emit, op_str, pn_args[1], 0, 255);
|
|
asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RSR(0, 3, 1, sr, r0));
|
|
} else if (op == MP_QSTR_wur) {
|
|
mp_uint_t sr = get_arg_i(emit, op_str, pn_args[1], 0, 255);
|
|
asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RSR(0, 3, 15, sr, r0));
|
|
} else if (op == MP_QSTR_xsr) {
|
|
mp_uint_t sr = get_arg_i(emit, op_str, pn_args[1], 0, 255);
|
|
asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RSR(0, 1, 6, sr, r0));
|
|
} else
|
|
#endif
|
|
{
|
|
goto unknown_op;
|
|
}
|
|
} else if (n_args == 3) {
|
|
for (size_t index = 0; index < MP_ARRAY_SIZE(BRANCH_OPCODE_NAMES); index++) {
|
|
if (BRANCH_OPCODE_NAMES[index] == op) {
|
|
int r0 = get_arg_reg(emit, op_str, pn_args[0]);
|
|
int r1 = get_arg_reg(emit, op_str, pn_args[1]);
|
|
int label = get_arg_label(emit, op_str, pn_args[2]);
|
|
asm_xtensa_bcc_reg_reg_label(&emit->as, index, r0, r1, label);
|
|
return;
|
|
}
|
|
}
|
|
|
|
if (op == MP_QSTR_addi_n) {
|
|
mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
|
|
mp_uint_t r1 = get_arg_reg(emit, op_str, pn_args[1]);
|
|
mp_int_t imm4 = get_arg_i(emit, op_str, pn_args[2], -1, 15);
|
|
asm_xtensa_op16(&emit->as, ASM_XTENSA_ENCODE_RRRN(11, r0, r1, (imm4 != 0 ? imm4 : -1)));
|
|
} else if (op == MP_QSTR_addmi) {
|
|
mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
|
|
mp_uint_t r1 = get_arg_reg(emit, op_str, pn_args[1]);
|
|
mp_int_t imm8 = get_arg_i(emit, op_str, pn_args[2], -128 * 256, 127 * 256);
|
|
if ((imm8 & 0xFF) != 0) {
|
|
emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("%d is not a multiple of %d"), imm8, 256));
|
|
} else {
|
|
asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRI8(2, 13, r1, r0, imm8 >> 8));
|
|
}
|
|
} else if (op == MP_QSTR_bbci) {
|
|
mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
|
|
mp_uint_t bit = get_arg_i(emit, op_str, pn_args[1], 0, 31);
|
|
mp_int_t label = get_arg_label(emit, op_str, pn_args[2]);
|
|
asm_xtensa_bit_branch(&emit->as, r0, bit, label, 6);
|
|
} else if (op == MP_QSTR_bbsi) {
|
|
mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
|
|
mp_uint_t bit = get_arg_i(emit, op_str, pn_args[1], 0, 31);
|
|
mp_uint_t label = get_arg_label(emit, op_str, pn_args[2]);
|
|
asm_xtensa_bit_branch(&emit->as, r0, bit, label, 14);
|
|
} else if (op == MP_QSTR_slli) {
|
|
mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
|
|
mp_uint_t r1 = get_arg_reg(emit, op_str, pn_args[1]);
|
|
mp_uint_t bits = 32 - get_arg_i(emit, op_str, pn_args[2], 1, 31);
|
|
asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRR(0, 1, 0 | ((bits >> 4) & 0x01), r0, r1, bits & 0x0F));
|
|
} else if (op == MP_QSTR_srai) {
|
|
mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
|
|
mp_uint_t r1 = get_arg_reg(emit, op_str, pn_args[1]);
|
|
mp_uint_t bits = get_arg_i(emit, op_str, pn_args[2], 0, 31);
|
|
asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRR(0, 1, 2 | ((bits >> 4) & 0x01), r0, bits & 0x0F, r1));
|
|
} else if (op == MP_QSTR_srli) {
|
|
mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
|
|
mp_uint_t r1 = get_arg_reg(emit, op_str, pn_args[1]);
|
|
mp_uint_t bits = get_arg_i(emit, op_str, pn_args[2], 0, 15);
|
|
asm_xtensa_op24(&emit->as, ASM_XTENSA_ENCODE_RRR(0, 1, 4, r0, bits, r1));
|
|
} else if (op == MP_QSTR_l32i_n) {
|
|
mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
|
|
mp_uint_t r1 = get_arg_reg(emit, op_str, pn_args[1]);
|
|
mp_uint_t imm = get_arg_i(emit, op_str, pn_args[2], 0, 60);
|
|
if ((imm & 0x03) != 0) {
|
|
emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("%d is not a multiple of %d"), imm, 4));
|
|
} else {
|
|
asm_xtensa_op_l32i_n(&emit->as, r0, r1, imm >> 2);
|
|
}
|
|
} else if (op == MP_QSTR_s32i_n) {
|
|
mp_uint_t r0 = get_arg_reg(emit, op_str, pn_args[0]);
|
|
mp_uint_t r1 = get_arg_reg(emit, op_str, pn_args[1]);
|
|
mp_uint_t imm = get_arg_i(emit, op_str, pn_args[2], 0, 60);
|
|
if ((imm & 0x03) != 0) {
|
|
emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("%d is not a multiple of %d"), imm, 4));
|
|
} else {
|
|
asm_xtensa_op_s32i_n(&emit->as, r0, r1, imm >> 2);
|
|
}
|
|
} else {
|
|
goto unknown_op;
|
|
}
|
|
|
|
} else {
|
|
goto unknown_op;
|
|
}
|
|
|
|
return;
|
|
|
|
unknown_op:
|
|
emit_inline_xtensa_error_exc(emit, mp_obj_new_exception_msg_varg(&mp_type_SyntaxError, MP_ERROR_TEXT("unsupported Xtensa instruction '%s' with %d arguments"), op_str, n_args));
|
|
return;
|
|
|
|
/*
|
|
branch_not_in_range:
|
|
emit_inline_xtensa_error_msg(emit, MP_ERROR_TEXT("branch not in range"));
|
|
return;
|
|
*/
|
|
}
|
|
|
|
const emit_inline_asm_method_table_t emit_inline_xtensa_method_table = {
|
|
#if MICROPY_DYNAMIC_COMPILER
|
|
emit_inline_xtensa_new,
|
|
emit_inline_xtensa_free,
|
|
#endif
|
|
|
|
emit_inline_xtensa_start_pass,
|
|
emit_inline_xtensa_end_pass,
|
|
emit_inline_xtensa_count_params,
|
|
emit_inline_xtensa_label,
|
|
emit_inline_xtensa_op,
|
|
};
|
|
|
|
#endif // MICROPY_EMIT_INLINE_XTENSA
|