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Damien George
d41b8dc52e
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This fixes a regression made by 9e9da6cb0d.
There are two issues here:
1. `MPY_FEATURE_ARCH` and `MP_NATIVE_ARCH_xxx` are not visible in this file
because `py/persistentcode.h` is not included.
2. Even if they were visible the macro logic will not work because
`MP_NATIVE_ARCH_xxx` are enum values and cannot be used in #if logic.
What this means is that the first #if is always true, so there is no cache
flushing on ARM (non-Thumb) or RISC-V targets. This breaks native code on,
eg, ESP32-P4.
The fix here aims to simplify the logic by using built-in compiler defines
to select the target:
- On an ARM Thumb target with `__ICACHE_PRESENT` enabled, it will flush the
cache.
- On an ARM (non-Thumb) target, it will prefer `__builtin___clear_cache()`
if possible, otherwise it will use inline assembler.
- On a RISC-V target, it will use `MP_HAL_CLEAN_DCACHE()` if that macro is
defined (that's only on ESP32-P4 at the moment).
The logic should be the same as before, except for the cases where an
emitter is enabled on a mismatching architecture. For example, if
`MICROPY_EMIT_THUMB` and/or `MICROPY_EMIT_INLINE_THUMB` were enabled on a
non-Thumb target, previously that will try to generate code to flush caches
(which doesn't really make sense), but now it will not. This actually
happened for `mpy-cross` which does enable all the emitters, and prior to
this fix would follow the Thumb path, but not generate any code because
`__ICACHE_PRESENT` is disabled (at least when building `mpy-cross` on x86).
Signed-off-by: Damien George <damien@micropython.org>