These classes are based on the Quadrature Encoder blocks of the i.MXRT
MCUs. The i.MXRT 102x has two encoders, the other ones four. The i.MXRT
101x does not support this function. It is implemented as two classes,
Encoder and Counter.
The number of pins that can be uses as inputs is limited by the MCU
architecture and the board schematics. The Encoder class supports:
- Defining the module.
- Defining the input pins.
- Defining a pin for an index signal.
- Defining a pin for a reset signal.
- Defining an output pin showing the compare match signal.
- Setting the number of cycles per revolution (min/max).
- Setting the initial value for the position.
- Setting the counting direction.
- Setting a glitch filter.
- Defining callbacks for getting to a specific position, overrun and
underrun (starting the next revolution). These callbacks can be hard
interrupts to ensure short latency.
The encoder counts all phases of a cycle. The span for the position is
2**32, for the revolution is 2**16. The highest input frequency is
CPU-Clock/24. Note that the "phases" argument is emulated at the API
level (the hardware will always count all phases).
The Counter mode counts single pulses on input A of the Encoder. The
configuration supports:
- Defining the module.
- Defining the input pin.
- Defining the counting direction, either fixed or controlled by the level
of an input pin.
- Defining a pin for an index signal.
- Defining an output pin showing the compare match signal.
- Setting the counter value.
- Setting the glitch filter.
- Defining a callback which is called at a certain value.
- Settings for MIMXRT1015. The MIMXRT1015 MCU has only one encoder/counter
unit.
The counting range is 0 - 2**32-1 and a 16 bit overrun counter. The
highest input frequency is CPU-Clock/12.
The implementation of the `.irq()` method uses the common code from
`shared/runtime/mpirq.c`, including the `irq().flags()` and
`irq().trigger()` methods.
Signed-off-by: robert-hh <robert@hammelrath.com>
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