mirror of
https://github.com/micropython/micropython.git
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280e6e2a40
Signed-off-by: iabdalkader <i.abdalkader@gmail.com> Signed-off-by: Damien George <damien@micropython.org>
313 lines
11 KiB
C
313 lines
11 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2024-2025 OpenMV LLC.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "py/runtime.h"
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#include "py/mphal.h"
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#include "py/mperrno.h"
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#include "extmod/modmachine.h"
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#if MICROPY_PY_MACHINE_SPI
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#include "clk.h"
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#include "spi.h"
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#include "sys_ctrl_spi.h"
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typedef struct _machine_spi_obj_t {
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mp_obj_base_t base;
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uint8_t id;
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SPI_Type *inst;
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bool is_lp;
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} machine_spi_obj_t;
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static machine_spi_obj_t machine_spi_obj[] = {
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#if defined(MICROPY_HW_SPI0_SCK)
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[0] = {{&machine_spi_type}, 0, (SPI_Type *)SPI0_BASE, false},
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#endif
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#if defined(MICROPY_HW_SPI1_SCK)
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[1] = {{&machine_spi_type}, 1, (SPI_Type *)SPI1_BASE, false},
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#endif
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#if defined(MICROPY_HW_SPI2_SCK)
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[2] = {{&machine_spi_type}, 2, (SPI_Type *)SPI2_BASE, false},
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#endif
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#if defined(MICROPY_HW_SPI3_SCK)
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[3] = {{&machine_spi_type}, 3, (SPI_Type *)SPI3_BASE, false},
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#endif
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#if defined(MICROPY_HW_LPSPI0_SCK)
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[4] = {{&machine_spi_type}, 4, (SPI_Type *)LPSPI0_BASE, true},
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#endif
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};
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static inline uint32_t spi_get_clk(machine_spi_obj_t *spi) {
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return spi->is_lp ? GetSystemCoreClock() : GetSystemAHBClock();
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}
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static void spi_init(machine_spi_obj_t *spi, uint32_t baudrate,
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uint32_t polarity, uint32_t phase, uint32_t bits, uint32_t firstbit) {
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const machine_pin_obj_t *pins[4] = { NULL, NULL, NULL, NULL };
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switch (spi->id) {
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#if defined(MICROPY_HW_SPI0_SCK)
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case 0:
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pins[0] = MICROPY_HW_SPI0_SCK;
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pins[1] = MICROPY_HW_SPI0_MISO;
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pins[2] = MICROPY_HW_SPI0_MOSI;
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#if defined(MICROPY_HW_SPI0_NSS)
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pins[3] = MICROPY_HW_SPI0_NSS;
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#endif
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break;
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#endif
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#if defined(MICROPY_HW_SPI1_SCK)
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case 1:
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pins[0] = MICROPY_HW_SPI1_SCK;
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pins[1] = MICROPY_HW_SPI1_MISO;
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pins[2] = MICROPY_HW_SPI1_MOSI;
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#if defined(MICROPY_HW_SPI1_NSS)
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pins[3] = MICROPY_HW_SPI1_NSS;
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#endif
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break;
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#endif
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#if defined(MICROPY_HW_SPI2_SCK)
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case 2:
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pins[0] = MICROPY_HW_SPI2_SCK;
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pins[1] = MICROPY_HW_SPI2_MISO;
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pins[2] = MICROPY_HW_SPI2_MOSI;
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#if defined(MICROPY_HW_SPI2_NSS)
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pins[3] = MICROPY_HW_SPI2_NSS;
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#endif
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break;
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#endif
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#if defined(MICROPY_HW_SPI3_SCK)
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case 3:
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pins[0] = MICROPY_HW_SPI3_SCK;
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pins[1] = MICROPY_HW_SPI3_MISO;
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pins[2] = MICROPY_HW_SPI3_MOSI;
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#if defined(MICROPY_HW_SPI3_NSS)
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pins[3] = MICROPY_HW_SPI3_NSS;
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#endif
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break;
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#endif
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#if defined(MICROPY_HW_LPSPI0_SCK)
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case 4: // LPSPI0
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pins[0] = MICROPY_HW_LPSPI0_SCK;
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pins[1] = MICROPY_HW_LPSPI0_MISO;
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pins[2] = MICROPY_HW_LPSPI0_MOSI;
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#if defined(MICROPY_HW_LPSPI0_NSS)
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pins[3] = MICROPY_HW_LPSPI0_NSS;
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#endif
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break;
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#endif
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default:
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return;
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}
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// Disable SPI.
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spi_disable(spi->inst);
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// Enable clocks.
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if (spi->is_lp) {
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enable_lpspi_clk();
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}
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// Configure SPI pins.
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for (size_t i = 0; i < MP_ARRAY_SIZE(pins) && pins[i]; i++) {
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mp_hal_pin_config(pins[i], MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
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MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_SPI, true);
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}
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// Disable all interrupts.
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spi_mask_interrupts(spi->inst);
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// Configure baudrate clock
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spi_set_bus_speed(spi->inst, baudrate, spi_get_clk(spi));
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// Configure FIFOs
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spi_set_tx_threshold(spi->inst, 0);
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spi_set_rx_threshold(spi->inst, 0);
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if (!spi->is_lp) {
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spi_set_rx_sample_delay(spi->inst, 0);
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spi_set_tx_fifo_start_level(spi->inst, 0);
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}
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// Configure SPI bus mode.
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uint32_t spi_mode = (polarity << 1) | phase;
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if (!spi->is_lp) {
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spi_set_mode(spi->inst, spi_mode);
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} else {
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lpspi_set_mode(spi->inst, spi_mode);
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}
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// Configure SPI bus protocol.
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uint32_t spi_proto = SPI_PROTO_SPI;
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if (!spi->is_lp) {
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spi_set_protocol(spi->inst, spi_proto);
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} else {
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lpspi_set_protocol(spi->inst, spi_proto);
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}
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// Configure SPI transfer mode.
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if (!spi->is_lp) {
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spi_mode_master(spi->inst);
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}
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// Configure frame size.
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if (!spi->is_lp) {
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spi_set_dfs(spi->inst, bits);
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} else {
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lpspi_set_dfs(spi->inst, bits);
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}
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// Configure slave select pin
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spi_control_ss(spi->inst, 0, true);
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if (!spi->is_lp) {
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spi_set_sste(spi->inst, false);
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} else {
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lpspi_set_sste(spi->inst, false);
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}
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// Clear IRQs.
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(void)spi->inst->SPI_ICR;
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// Enable SPI.
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spi_enable(spi->inst);
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}
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static void machine_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
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machine_spi_obj_t *self = MP_OBJ_TO_PTR(self_in);
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uint32_t baudrate = spi_get_bus_speed(self->inst, spi_get_clk(self));
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mp_printf(print, "SPI(%u, baudrate=%u, lp=%u)", self->id, baudrate, self->is_lp);
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}
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mp_obj_t machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
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enum { ARG_id, ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits, ARG_firstbit, ARG_sck, ARG_mosi, ARG_miso };
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static const mp_arg_t allowed_args[] = {
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{ MP_QSTR_id, MP_ARG_REQUIRED | MP_ARG_OBJ },
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{ MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 500000} },
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{ MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
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{ MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
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{ MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} },
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{ MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
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{ MP_QSTR_sck, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
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{ MP_QSTR_mosi, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
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{ MP_QSTR_miso, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
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};
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// Parse args.
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mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
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// Get spi bus.
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int spi_id = mp_obj_get_int(args[ARG_id].u_obj);
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if (spi_id < 0 || spi_id >= MP_ARRAY_SIZE(machine_spi_obj) || !machine_spi_obj[spi_id].inst) {
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mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("SPI(%d) doesn't exist"), spi_id);
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}
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// Get static peripheral object.
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machine_spi_obj_t *self = &machine_spi_obj[spi_id];
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// here we would check the sck/mosi/miso pins and configure them, but it's not implemented
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if (args[ARG_sck].u_obj != MP_OBJ_NULL ||
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args[ARG_mosi].u_obj != MP_OBJ_NULL ||
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args[ARG_miso].u_obj != MP_OBJ_NULL) {
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mp_raise_ValueError(MP_ERROR_TEXT("explicit choice of sck/mosi/miso is not implemented"));
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}
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// Initialize and configure SPI.
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spi_init(self, args[ARG_baudrate].u_int, args[ARG_polarity].u_int,
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args[ARG_phase].u_int, args[ARG_bits].u_int, args[ARG_firstbit].u_int);
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return MP_OBJ_FROM_PTR(self);
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}
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static void machine_spi_init(mp_obj_base_t *self_in, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
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enum { ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits, ARG_firstbit };
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static const mp_arg_t allowed_args[] = {
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{ MP_QSTR_baudrate, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
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{ MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
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{ MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
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{ MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
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{ MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
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};
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// Parse the arguments.
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machine_spi_obj_t *self = (machine_spi_obj_t *)self_in;
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mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
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// Initialize and configure SPI.
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spi_init(self, args[ARG_baudrate].u_int, args[ARG_polarity].u_int,
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args[ARG_phase].u_int, args[ARG_bits].u_int, args[ARG_firstbit].u_int);
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}
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static void machine_spi_deinit(mp_obj_base_t *self_in) {
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machine_spi_obj_t *self = (machine_spi_obj_t *)self_in;
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// Disable all interrupts.
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spi_mask_interrupts(self->inst);
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// Disable SS pin.
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spi_control_ss(self->inst, 0, 0);
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// Disable SPI.
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spi_disable(self->inst);
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// Deinitialize GPIOs and clocks.
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if (self->is_lp) {
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disable_lpspi_clk();
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}
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}
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static void machine_spi_transfer(mp_obj_base_t *self_in, size_t len, const uint8_t *src, uint8_t *dest) {
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machine_spi_obj_t *self = (machine_spi_obj_t *)self_in;
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spi_transfer_t spi_xfer = {
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.tx_buff = src,
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.tx_total_cnt = len,
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.rx_buff = dest,
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.rx_total_cnt = len,
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.tx_default_val = 0xFF,
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.tx_default_enable = true,
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.mode = SPI_TMOD_TX_AND_RX,
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};
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// TODO redo transfer_blocking to timeout and poll events.
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if (!self->is_lp) {
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spi_transfer_blocking(self->inst, &spi_xfer);
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} else {
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lpspi_transfer_blocking(self->inst, &spi_xfer);
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}
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}
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static const mp_machine_spi_p_t machine_spi_p = {
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.init = machine_spi_init,
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.deinit = machine_spi_deinit,
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.transfer = machine_spi_transfer,
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};
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MP_DEFINE_CONST_OBJ_TYPE(
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machine_spi_type,
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MP_QSTR_SPI,
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MP_TYPE_FLAG_NONE,
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make_new, machine_spi_make_new,
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print, machine_spi_print,
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protocol, &machine_spi_p,
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locals_dict, &mp_machine_spi_locals_dict
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);
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#endif // MICROPY_PY_MACHINE_SPI
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