mirror of
https://github.com/andreas-abel/nanoBench.git
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nanoBench Cache Analyzer
This commit is contained in:
Andreas Abel
360
tools/CacheAnalyzer/cacheSim.py
Executable file
360
tools/CacheAnalyzer/cacheSim.py
Executable file
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#!/usr/bin/python
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import random
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from itertools import count
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from numpy import median
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from cacheLib import *
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import logging
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log = logging.getLogger(__name__)
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def rindex(lst, value):
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return len(lst) - lst[::-1].index(value) - 1
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class ReplPolicySim(object):
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def __init__(self, assoc):
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self.assoc = assoc
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self.blocks = [None] * assoc
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def acc(self, block):
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raise NotImplementedError()
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def flush(self, block):
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if block in self.blocks:
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self.blocks[self.blocks.index(block)] = block
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class FIFOSim(ReplPolicySim):
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def __init__(self, assoc):
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super(FIFOSim, self).__init__(assoc)
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def acc(self, block):
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hit = block in self.blocks
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if not hit:
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self.blocks = [block] + self.blocks[0:self.assoc-1]
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return hit
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class LRUSim(ReplPolicySim):
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def __init__(self, assoc):
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super(LRUSim, self).__init__(assoc)
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def acc(self, block):
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hit = block in self.blocks
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self.blocks = [block] + [b for b in self.blocks if b!=block][0:self.assoc-1]
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return hit
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class PLRUSim(ReplPolicySim):
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def __init__(self, assoc, linearInit=False, randLeaf=False, randRoot=False):
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super(PLRUSim, self).__init__(assoc)
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self.linearInit = linearInit
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self.randLeaf = randLeaf
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self.randRoot = randRoot
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self.bits = [[0 for _ in range(0, 2**(level))] for level in range(0, int(math.ceil(math.log(assoc,2))))]
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def acc(self, block):
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hit = block in self.blocks
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if hit:
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self.updateIndexBits(self.blocks.index(block))
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else:
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if self.linearInit and None in self.blocks:
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idx = self.blocks.index(None)
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else:
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idx = self.getIndexForBits()
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self.blocks[idx] = block
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self.updateIndexBits(idx)
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return hit
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def getIndexForBits(self, level=0, idx = 0):
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if level == len(self.bits) - 1:
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ret = 2*idx
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if self.randLeaf:
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ret += random.randint(0,1)
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else:
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ret += self.bits[level][idx]
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return min(self.assoc - 1, ret)
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elif level == 0 and self.randRoot:
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return self.getIndexForBits(level + 2, random.randint(0,2))
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else:
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return self.getIndexForBits(level + 1, 2*idx + self.bits[level][idx])
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def updateIndexBits(self, accIndex):
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lastIdx = accIndex
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for level in reversed(range(0, len(self.bits))):
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curIdx = lastIdx/2
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self.bits[level][curIdx] = 1 - (lastIdx % 2)
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lastIdx = curIdx
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class PLRUlSim(PLRUSim):
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def __init__(self, assoc):
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super(PLRUlSim, self).__init__(assoc, linearInit=True)
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class PLRURandSim(PLRUSim):
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def __init__(self, assoc):
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super(PLRURandSim, self).__init__(assoc, randLeaf=True)
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class RandPLRUSim(PLRUSim):
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def __init__(self, assoc):
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super(RandPLRUSim, self).__init__(assoc, randRoot=True)
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AllRandPLRUVariants = {
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'RandPLRU': RandPLRUSim,
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'PLRURand': PLRURandSim,
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}
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class QLRUSim(ReplPolicySim):
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def __init__(self, assoc, hitFunc, missFunc, replIdxFunc, updFunc, updOnMissOnly=False):
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super(QLRUSim, self).__init__(assoc)
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self.hitFunc = hitFunc
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self.missFunc = missFunc
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self.replIdxFunc = replIdxFunc
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self.updFunc = updFunc
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self.updOnMissOnly = updOnMissOnly
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self.bits = [3] * assoc
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def acc(self, block):
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hit = block in self.blocks
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if hit:
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index = self.blocks.index(block)
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self.bits[index] = self.hitFunc(self.bits[index])
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else:
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if self.updOnMissOnly:
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self.bits = self.updFunc(self.bits, -1)
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index = self.replIdxFunc(self.bits, self.blocks)
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self.blocks[index] = block
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self.bits[index] = self.missFunc()
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if not self.updOnMissOnly:
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self.bits = self.updFunc(self.bits, index)
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return hit
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QLRUHitFuncs = {
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'H21': lambda x: {3:2, 2:1, 1:0, 0:0}[x],
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'H20': lambda x: {3:2, 2:0, 1:0, 0:0}[x],
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'H11': lambda x: {3:1, 2:1, 1:0, 0:0}[x],
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'H10': lambda x: {3:1, 2:0, 1:0, 0:0}[x],
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'H00': lambda x: {3:0, 2:0, 1:0, 0:0}[x],
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}
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QLRUMissFuncs = {
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'M0': lambda: 0,
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'M1': lambda: 1,
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'M2': lambda: 2,
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'M3': lambda: 3,
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}
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QLRUMissRandFuncs = {
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'MR32': lambda: (2 if random.randint(0,15) == 0 else 3),
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'MR31': lambda: (1 if random.randint(0,15) == 0 else 3),
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'MR30': lambda: (0 if random.randint(0,15) == 0 else 3),
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'MR21': lambda: (1 if random.randint(0,15) == 0 else 2),
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'MR20': lambda: (0 if random.randint(0,15) == 0 else 2),
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'MR10': lambda: (0 if random.randint(0,15) == 0 else 1),
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}
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QLRUReplIdxFuncs = {
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'R0': lambda bits, blocks: blocks.index(None) if None in blocks else bits.index(3), #CFL L3
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'R1': lambda bits, blocks: blocks.index(None) if None in blocks else (bits.index(3) if 3 in bits else 0), #IVB
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'R2': lambda bits, blocks: rindex(blocks, None) if None in blocks else bits.index(3), # CFL L2
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}
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QLRUUpdFuncs = {
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'U0': lambda bits, replIdx: [b + (3 - max(bits)) for b in bits], #CFL L3
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'U1': lambda bits, replIdx: [(b + (3 - max(bits[:replIdx]+bits[replIdx+1:])) if i != replIdx else b) for i, b in enumerate(bits)], #CFL L2
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'U2': lambda bits, replIdx: [b+1 for b in bits] if not 3 in bits else bits, # IVB
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'U3': lambda bits, replIdx: [((b+1) if i != replIdx else b) for i, b in enumerate(bits)] if not 3 in bits else bits,
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}
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# all deterministic QLRU variants
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AllDetQLRUVariants = {
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'QLRU_' + hf[0] + '_' + mf[0] + '_' + rf[0] + '_' + uf[0] + ('_UMO' if umo else ''):
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type('QLRU_' + hf[0] + '_' + mf[0] + '_' + rf[0] + '_' + uf[0] + ('_UMO' if umo else ''), (QLRUSim,),
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{'__init__': lambda self, assoc, hfl=hf[1], mfl=mf[1], rfl=rf[1], ufl=uf[1], umol=umo: QLRUSim.__init__(self, assoc, hfl, mfl, rfl, ufl, umol)})
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for hf in QLRUHitFuncs.items()
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for mf in QLRUMissFuncs.items()
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for rf in QLRUReplIdxFuncs.items()
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for uf in QLRUUpdFuncs.items()
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for umo in [False, True]
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if not (rf[0] in ['R0', 'R2'] and uf[0] in ['U2', 'U3'])
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}
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# all randomized QLRU variants
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AllRandQLRUVariants = {
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'QLRU_' + hf[0] + '_' + mf[0] + '_' + rf[0] + '_' + uf[0] + ('_UMO' if umo else ''):
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type('QLRU_' + hf[0] + '_' + mf[0] + '_' + rf[0] + '_' + uf[0] + ('_UMO' if umo else ''), (QLRUSim,),
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{'__init__': lambda self, assoc, hfl=hf[1], mfl=mf[1], rfl=rf[1], ufl=uf[1], umol=umo: QLRUSim.__init__(self, assoc, hfl, mfl, rfl, ufl, umol)})
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for hf in QLRUHitFuncs.items()
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for mf in QLRUMissRandFuncs.items()
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for rf in QLRUReplIdxFuncs.items()
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for uf in QLRUUpdFuncs.items()
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for umo in [False, True]
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if not (rf[0] in ['R0', 'R2'] and uf[0] in ['U2', 'U3'])
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}
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class MRUSim(ReplPolicySim):
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def __init__(self, assoc, updIfNotFull=True):
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super(MRUSim, self).__init__(assoc)
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self.bits = [1] * assoc
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self.updIfNotFull = updIfNotFull
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def acc(self, block):
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hit = block in self.blocks
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full = not (None in self.blocks)
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if hit:
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index = self.blocks.index(block)
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else:
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if not full:
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index = self.blocks.index(None)
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else:
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index = self.bits.index(1)
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self.blocks[index] = block
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if (full or self.updIfNotFull):
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self.bits[index] = 0
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if not 1 in self.bits:
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self.bits = [(1 if bi!=index else 0) for bi, _ in enumerate(self.bits)]
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return hit
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class MRUNSim(MRUSim):
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def __init__(self, assoc):
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super(MRUNSim, self).__init__(assoc, False)
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# according to ISCA'10 paper
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class NRUSim(ReplPolicySim):
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def __init__(self, assoc):
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super(NRUSim, self).__init__(assoc)
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self.bits = [1] * assoc
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def acc(self, block):
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hit = block in self.blocks
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if hit:
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index = self.blocks.index(block)
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self.bits[index] = 0
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else:
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while not 1 in self.bits:
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self.bits = [1] * self.assoc
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index = self.bits.index(1)
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self.blocks[index] = block
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self.bits[index] = 0
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return hit
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CommonPolicies = {
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'FIFO': FIFOSim,
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'LRU': LRUSim,
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'PLRU': PLRUSim,
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'PLRUl': PLRUlSim,
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'MRU': MRUSim, # NHM
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'MRU_N': MRUNSim, # SNB
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'NRU': NRUSim,
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'QLRU_H11_M1_R0_U0': AllDetQLRUVariants['QLRU_H11_M1_R0_U0'], # CFL L3
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'QLRU_H21_M1_R0_U0_UMO': AllDetQLRUVariants['QLRU_H21_M2_R0_U0_UMO'], # https://arxiv.org/pdf/1904.06278.pdf paper
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'QLRU_H11_M1_R1_U2': AllDetQLRUVariants['QLRU_H11_M1_R1_U2'], # IVB
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'QLRU_H00_M1_R2_U1': AllDetQLRUVariants['QLRU_H00_M1_R2_U1'], # CFL L2
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'QLRU_H00_M1_R0_U1': AllDetQLRUVariants['QLRU_H00_M1_R0_U1'], # CNL L2
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'SRRIP': AllDetQLRUVariants['QLRU_H00_M2_R0_U0_UMO'],
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}
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AllDetPolicies = dict(CommonPolicies.items() + AllDetQLRUVariants.items())
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AllRandPolicies = dict(AllRandQLRUVariants.items() + AllRandPLRUVariants.items())
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AllPolicies = dict(AllDetPolicies.items() + AllRandPolicies.items())
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def getHits(seq, policySimClass, assoc, nSets):
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hits = 0
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policySims = [policySimClass(assoc) for _ in range(0, nSets)]
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for blockStr in seq.split():
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blockName = getBlockName(blockStr)
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if '!' in blockStr:
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for policySim in policySims:
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policySim.flush(blockName)
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else:
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for policySim in policySims:
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hit = policySim.acc(blockName)
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if '?' in blockStr:
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hits += int(hit)
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return hits
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def getAges(blocks, seq, policySimClass, assoc):
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ages = {}
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for block in blocks:
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for i in count(0):
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curSeq = seq + ' ' + ' '.join('N' + str(n) for n in range(0,i)) + ' ' + block + '?'
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if getHits(policySimClass(assoc), curSeq) == 0:
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ages[block] = i
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break
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return ages
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def getGraph(blocks, seq, policySimClass, assoc, maxAge, nSets=1, nRep=1, agg="med"):
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traces = []
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for block in blocks:
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trace = []
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for i in range(0, maxAge):
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curSeq = seq + ' ' + ' '.join('N' + str(n) for n in range(0,i)) + ' ' + block + '?'
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hits = [getHits(curSeq, policySimClass, assoc, nSets) for _ in range(0, nRep)]
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if agg == "med":
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aggValue = median(hits)
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elif agg == "min":
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aggValue = min(hits)
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else:
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aggValue = float(sum(hits))/nRep
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trace.append(aggValue)
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traces.append((block, trace))
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return traces
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def getPermutations(policySimClass, assoc, maxAge=None):
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# initial ages
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initBlocks = ['I' + str(i) for i in range(0, assoc)]
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seq = ' '.join(initBlocks)
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initAges = getAges(initBlocks, seq, policySimClass, assoc)
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accSeqStr = 'Access sequence: <wbinvd> ' + seq
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print accSeqStr
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print 'Ages: {' + ', '.join(b + ': ' + str(initAges[b]) for b in initBlocks) + '}'
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blocks = ['B' + str(i) for i in range(0, assoc)]
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baseSeq = ' '.join(initBlocks + blocks)
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ages = getAges(blocks, baseSeq, policySimClass, assoc)
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accSeqStr = 'Access sequence: <wbinvd> ' + baseSeq
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print accSeqStr
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print 'Ages: {' + ', '.join(b + ': ' + str(ages[b]) for b in blocks) + '}'
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blocksSortedByAge = [a[0] for a in sorted(ages.items(), key=lambda x: -x[1])] # most recent block first
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for permI, permBlock in enumerate(blocksSortedByAge):
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seq = baseSeq + ' ' + permBlock
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permAges = getAges(blocks, seq, policySimClass, assoc)
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accSeqStr = 'Access sequence: <wbinvd> ' + seq
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perm = [-1] * assoc
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for bi, b in enumerate(blocksSortedByAge):
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permAge = permAges[b]
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if permAge < 1 or permAge > assoc:
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break
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perm[assoc-permAge] = bi
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print u'\u03A0_' + str(permI) + ' = ' + str(tuple(perm))
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