# Performance monitoring events for processors based on the Core and the Enhanced Core microarchitectures.
# See Table 19-26 of Intel's "System Programming Guide" (Jan. 2019)

C2.07 UOPS_RETIRED.FUSED
C2.0F UOPS_RETIRED.ANY
A0.00 RS_UOPS_DISPATCHED
A1.01.CTR=0 RS_UOPS_DISPATCHED.PORT0
A1.02.CTR=0 RS_UOPS_DISPATCHED.PORT1
A1.04.CTR=0 RS_UOPS_DISPATCHED.PORT2
A1.08.CTR=0 RS_UOPS_DISPATCHED.PORT3
A1.10.CTR=0 RS_UOPS_DISPATCHED.PORT4
A1.20.CTR=0 RS_UOPS_DISPATCHED.PORT5
88.00 BR_INST_EXEC
89.00 BR_MISSP_EXEC
43.02 L1D_ALL_CACHE_REF
45.0F L1D_REPL
CB.01.CTR=0 MEM_LOAD_RETIRED.L1D_MISS
CB.02.CTR=0 MEM_LOAD_RETIRED.L1D_LINE_MISS
CB.04.CTR=0 MEM_LOAD_RETIRED.L2_MISS
CB.08.CTR=0 MEM_LOAD_RETIRED.L2_LINE_MISS
40.08 L1D_CACHE_LD.M
40.04 L1D_CACHE_LD.E
40.02 L1D_CACHE_LD.S
40.01 L1D_CACHE_LD.I
40.0E L1D_CACHE_LD.MES
29.78 L2_LD.THIS_CORE.ALL_INCL.M
29.74 L2_LD.THIS_CORE.ALL_INCL.E
29.72 L2_LD.THIS_CORE.ALL_INCL.S
29.71 L2_LD.THIS_CORE.ALL_INCL.I
29.7E L2_LD.THIS_CORE.ALL_INCL.MES