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33 lines
956 B
Plaintext
33 lines
956 B
Plaintext
# Based on https://raw.githubusercontent.com/intel/perfmon/refs/heads/main/ARL/events/arrowlake_lioncove_core.json (Version: 1.09)
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# Applies to processors with family-model in {6-C5, 6-C6}
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3C.00 CORE_CYCLES
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C0.00 INST_RETIRED
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79.04 IDQ.MITE_UOPS
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79.08 IDQ.DSB_UOPS
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79.20 IDQ.MS_UOPS
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A8.01 LSD.UOPS
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AE.01 UOPS_ISSUED
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B1.01.CTR=3 UOPS_EXECUTED
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C2.02 UOPS_RETIRED.SLOTS
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B2.01 UOPS_DISPATCHED.INT_EU_ALL
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B2.02 UOPS_DISPATCHED.ALU
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B2.08 UOPS_DISPATCHED.SLOW
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B2.04 UOPS_DISPATCHED.LOAD
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B2.10 UOPS_DISPATCHED.STD
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B2.20 UOPS_DISPATCHED.SHIFT
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B2.40 UOPS_DISPATCHED.JMP
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B2.80 UOPS_DISPATCHED.STA
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B3.01 FP_ARITH_DISPATCHED.V0
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B3.02 FP_ARITH_DISPATCHED.V1
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B3.04 FP_ARITH_DISPATCHED.V2
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B3.08 FP_ARITH_DISPATCHED.V3
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C4.00 BR_INST_RETIRED.ALL_BRANCHES
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C5.00 BR_MISP_RETIRED.ALL_BRANCHES
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D1.01 MEM_LOAD_RETIRED.L1_HIT
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D1.08 MEM_LOAD_RETIRED.L1_MISS
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D1.02 MEM_LOAD_RETIRED.L2_HIT
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D1.10 MEM_LOAD_RETIRED.L2_MISS
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D1.04 MEM_LOAD_RETIRED.L3_HIT
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D1.20 MEM_LOAD_RETIRED.L3_MISS
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