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24 lines
854 B
Plaintext
24 lines
854 B
Plaintext
# Performance monitoring events for processors based on the Haswell microarchitecture.
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# Applies to processors with DisplayFamily_DisplayModel of 06_3CH, 06_45H and 06_46H.
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# See Table 19-10 of Intel's "System Programming Guide" (Jan. 2019)
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3C.00 CORE_CYCLES
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C0.00 INST_RETIRED
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0E.01 UOPS_ISSUED
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C2.01 UOPS_RETIRED
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A1.01 UOPS_EXECUTED_PORT.PORT_0
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A1.02 UOPS_EXECUTED_PORT.PORT_1
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A1.04 UOPS_EXECUTED_PORT.PORT_2
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A1.08 UOPS_EXECUTED_PORT.PORT_3
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A1.10 UOPS_EXECUTED_PORT.PORT_4
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A1.20 UOPS_EXECUTED_PORT.PORT_5
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A1.40 UOPS_EXECUTED_PORT.PORT_6
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A1.80 UOPS_EXECUTED_PORT.PORT_7
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C4.00 BR_INST_RETIRED.ALL_BRANCHES
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C5.00 BR_MISP_RETIRED.ALL_BRANCHES
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D1.01 MEM_LOAD_UOPS_RETIRED.L1_HIT
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D1.08 MEM_LOAD_UOPS_RETIRED.L1_MISS
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D1.02 MEM_LOAD_UOPS_RETIRED.L2_HIT
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D1.10 MEM_LOAD_UOPS_RETIRED.L2_MISS
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D1.04 MEM_LOAD_UOPS_RETIRED.L3_HIT
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D1.20 MEM_LOAD_UOPS_RETIRED.L3_MISS |