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runnable pmbs version

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This commit is contained in:
JanLJL
2019-09-25 13:01:30 +02:00
parent 042c034838
commit 19dbd90849
3 changed files with 13 additions and 13 deletions
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15
osaca/data/vulcan.yml
View File

@@ -6,6 +6,7 @@ ROB_size: 180
retired_uOps_per_cycle: 4
scheduler_size: 60
hidden_loads: false
load_latency: {w: 4.0, x: 4.0, b: 4.0, h: 4.0, s: 4.0, d: 4.0, q: 4.0, v: 4.0}
ports: ["0", "0DV", "1", "1DV", "2", "3", "4", "5"]
port_model_scheme: |
┌-----------------------------------------------------------┐
@@ -389,7 +390,7 @@ instruction_forms:
pre-indexed: false
post-indexed: false
throughput: 0.5
latency: 4.0 # 0 0DV 1 1DV 2 3 4 5
latency: 0.0 # 0 0DV 1 1DV 2 3 4 5
port_pressure: [0.0, 0.0, 0.0, 0.0, 0.0, 0.5, 0.5, 0.0]
- name: "ldr"
operands:
@@ -403,7 +404,7 @@ instruction_forms:
pre-indexed: false
post-indexed: false
throughput: 0.5
latency: 4.0 # 0 0DV 1 1DV 2 3 4 5
latency: 0.0 # 0 0DV 1 1DV 2 3 4 5
port_pressure: [0.0, 0.0, 0.0, 0.0, 0.0, 0.5, 0.5, 0.0]
- name: "ldr"
operands:
@@ -417,7 +418,7 @@ instruction_forms:
pre-indexed: false
post-indexed: false
throughput: 0.5
latency: 4.0 # 0 0DV 1 1DV 2 3 4 5
latency: 0.0 # 0 0DV 1 1DV 2 3 4 5
port_pressure: [0.0, 0.0, 0.0, 0.0, 0.0, 0.5, 0.5, 0.0]
- name: "ldr"
operands:
@@ -431,7 +432,7 @@ instruction_forms:
pre-indexed: false
post-indexed: true
throughput: 0.5
latency: 4.0 # 0 0DV 1 1DV 2 3 4 5
latency: 0.0 # 0 0DV 1 1DV 2 3 4 5
port_pressure: [0.0, 0.0, 0.0, 0.0, 0.0, 0.5, 0.5, 0.0]
- name: "ldr"
operands:
@@ -445,7 +446,7 @@ instruction_forms:
pre-indexed: false
post-indexed: false
throughput: 0.5
latency: 4.0 # 0 0DV 1 1DV 2 3 4 5
latency: 0.0 # 0 0DV 1 1DV 2 3 4 5
port_pressure: [0.0, 0.0, 0.0, 0.0, 0.0, 0.5, 0.5, 0.0]
- name: "ldr"
operands:
@@ -459,7 +460,7 @@ instruction_forms:
pre-indexed: false
post-indexed: false
throughput: 0.5
latency: 4.0 # 0 0DV 1 1DV 2 3 4 5
latency: 0.0 # 0 0DV 1 1DV 2 3 4 5
port_pressure: [0.0, 0.0, 0.0, 0.0, 0.0, 0.5, 0.5, 0.0]
- name: "ldr"
operands:
@@ -473,7 +474,7 @@ instruction_forms:
pre-indexed: false
post-indexed: false
throughput: 0.5
latency: 4.0 # 0 0DV 1 1DV 2 3 4 5
latency: 0.0 # 0 0DV 1 1DV 2 3 4 5
port_pressure: [0.0, 0.0, 0.0, 0.0, 0.0, 0.5, 0.5, 0.0]
- name: "mov"
operands:

6
osaca/parser/parser_x86att.py
View File

@@ -16,10 +16,12 @@ class ParserX86ATT(BaseParser):
pp.ZeroOrMore(pp.Word(pp.printables))
).setResultsName(self.COMMENT_ID)
# Define x86 assembly identifier
id_offset = pp.Word(pp.nums) + pp.Suppress(pp.Literal('+'))
first = pp.Word(pp.alphas + '_.', exact=1)
rest = pp.Word(pp.alphanums + '_.')
rest = pp.Word(pp.alphanums + '$_.')
identifier = pp.Group(
pp.Combine(first + pp.Optional(rest)).setResultsName('name')
pp.Optional(id_offset).setResultsName('offset')
+ pp.Combine(first + pp.Optional(rest)).setResultsName('name')
).setResultsName('identifier')
# Label
self.label = pp.Group(

5
osaca/semantics/kernel_dg.py
View File

@@ -16,9 +16,6 @@ class KernelDG(nx.DiGraph):
self.model = hw_model
self.dg = self.create_DG(self.kernel)
self.loopcarried_deps = self.check_for_loopcarried_dep(self.kernel)
import pdb
pdb.set_trace()
def create_DG(self, kernel):
# 1. go through kernel instruction forms and add them as node attribute
@@ -53,7 +50,7 @@ class KernelDG(nx.DiGraph):
instruction_form['line_number'],
latency=load_lat,
)
for dep in self.find_depending(instruction_form, kernel[i + 1 :]):
for dep in self.find_depending(instruction_form, kernel[i + 1:]):
dg.add_edge(
instruction_form['line_number'],
dep['line_number'],