updated to travis-ci.org

This commit is contained in:
Julian Hammer
2019-11-13 16:43:04 +01:00
parent fe9cd6c0c9
commit 2fcfc01542

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@@ -13,8 +13,8 @@ auto-generating of testcases for assembly instructions creating latency
and throughput benchmarks on a specific instruction form and throughput
analysis and throughput prediction for a innermost loop kernel.
.. image:: https://travis-ci.com/RRZE-HPC/OSACA.svg?token=393L6z2HEXNiGLtZ43s6&branch=master
:target: https://travis-ci.com/RRZE-HPC/OSACA
.. image:: https://travis-ci.org/RRZE-HPC/OSACA.svg?token=393L6z2HEXNiGLtZ43s6&branch=master
:target: https://travis-ci.org/RRZE-HPC/OSACA
.. ..image:: https://landscape.io/github/RRZE-HPC/OSACA/master/landscape.svg?style=flat&badge_auth_token=c95f01b247f94bc79c09d21c5c827697
.. :target: https://landscape.io/github/RRZE-HPC/OSACA/master