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https://github.com/RRZE-HPC/OSACA.git
synced 2025-12-16 00:50:06 +01:00
minor fixes
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@@ -216,7 +216,11 @@ def _create_db_operand_aarch64(operand):
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elif operand in 'wxbhsdq':
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return {'class': 'register', 'prefix': operand}
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elif operand.startswith('v'):
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return {'class': 'register', 'prefix': 'v', 'shape': operand[1:2]}
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return {
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'class': 'register',
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'prefix': 'v',
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'shape': operand[1:2] if operand[1:2] != '' else 'd',
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}
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elif operand.startswith('m'):
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return {
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'class': 'memory',
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@@ -391,9 +395,7 @@ def _get_sanity_report_verbose(
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s += 'Instruction forms without port pressure assignment:\n' if len(m_pp) != 0 else ''
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for instr_form in m_pp:
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s += '{}{}{}\n'.format(BRIGHT_MAGENTA, _get_full_instruction_name(instr_form), WHITE)
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s += (
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'Instruction forms which might miss an ISA DB entry:\n' if len(suspic_instr) != 0 else ''
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)
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s += 'Instruction forms which might miss an ISA DB entry:\n' if len(suspic_instr) != 0 else ''
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for instr_form in suspic_instr:
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s += '{}{}{}\n'.format(BRIGHT_CYAN, _get_full_instruction_name(instr_form), WHITE)
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s += 'Duplicate instruction forms in uarch DB:\n' if len(dup_arch) != 0 else ''
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@@ -403,9 +405,7 @@ def _get_sanity_report_verbose(
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for instr_form in dup_isa:
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s += '{}{}{}\n'.format(BRIGHT_YELLOW, _get_full_instruction_name(instr_form), WHITE)
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s += (
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'Instruction forms existing in ISA DB but not in uarch DB:\n'
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if len(only_isa) != 0
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else ''
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'Instruction forms existing in ISA DB but not in uarch DB:\n' if len(only_isa) != 0 else ''
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)
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for instr_form in only_isa:
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s += '{}{}{}\n'.format(CYAN, _get_full_instruction_name(instr_form), WHITE)
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@@ -1,8 +1,8 @@
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testinstr-i_d_v
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testinstr-i_d_vd
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Latency: 4.013 cy
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Throughput: 0.501 cy
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testinstr2-mboi_v
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testinstr2-mboi_vs
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Latency: 4.013 cy
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Throughput: 0.501 cy
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