mirror of
https://github.com/RRZE-HPC/OSACA.git
synced 2026-01-05 10:40:06 +01:00
Linters update
This commit is contained in:
@@ -148,8 +148,13 @@ def _get_asmbench_output(input_data, isa):
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mnemonic = i_form.split("-")[0]
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operands = i_form.split("-")[1].split("_")
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operands = [_create_db_operand(op, isa) for op in operands]
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entry = instructionForm(instruction_id=mnemonic,operands_id=operands,throughput=_validate_measurement(float(input_data[i + 2].split()[1]), "tp"),
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latency=_validate_measurement(float(input_data[i + 1].split()[1]), "lt"),port_pressure=None)
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entry = instructionForm(
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instruction_id=mnemonic,
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operands_id=operands,
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throughput=_validate_measurement(float(input_data[i + 2].split()[1]), "tp"),
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latency=_validate_measurement(float(input_data[i + 1].split()[1]), "lt"),
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port_pressure=None,
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)
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if not entry.throughput or not entry.latency:
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warnings.warn(
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"Your measurement for {} looks suspicious".format(i_form)
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@@ -174,7 +179,13 @@ def _get_ibench_output(input_data, isa):
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mnemonic = instruction.split("-")[0]
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operands = instruction.split("-")[1].split("_")
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operands = [_create_db_operand(op, isa) for op in operands]
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entry = instructionForm(instruction_id=mnemonic,operands_id=operands,throughput=None,latency=None,port_pressure=None)
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entry = instructionForm(
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instruction_id=mnemonic,
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operands_id=operands,
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throughput=None,
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latency=None,
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port_pressure=None,
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)
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if "TP" in instruction:
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entry.throughput = _validate_measurement(float(line.split()[1]), "tp")
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if not entry.throughput:
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@@ -427,7 +427,9 @@ class ParserAArch64(BaseParser):
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if memory_address["index"]["shift_op"].lower() in valid_shift_ops:
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scale = 2 ** int(memory_address["index"]["shift"][0]["value"])
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if index is not None:
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index = RegisterOperand(name=index["name"], prefix_id=index["prefix"] if "prefix" in index else None)
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index = RegisterOperand(
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name=index["name"], prefix_id=index["prefix"] if "prefix" in index else None
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)
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new_dict = MemoryOperand(
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offset_ID=offset,
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base_id=RegisterOperand(name=base["name"], prefix_id=base["prefix"]),
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@@ -631,7 +633,7 @@ class ParserAArch64(BaseParser):
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def is_reg_dependend_of(self, reg_a, reg_b):
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"""Check if ``reg_a`` is dependent on ``reg_b``"""
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#if not isinstance(reg_b, Operand):
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# if not isinstance(reg_b, Operand):
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# print(reg_b)
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if not isinstance(reg_a, Operand):
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reg_a = RegisterOperand(name=reg_a["name"])
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@@ -6,14 +6,12 @@ import pickle
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import re
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import string
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from collections import defaultdict
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from copy import deepcopy
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from itertools import product
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from pathlib import Path
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import ruamel.yaml
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from osaca import __version__, utils
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from osaca.parser import ParserX86ATT
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from ruamel.yaml.compat import StringIO
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from osaca.parser.instruction_form import instructionForm
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from osaca.parser.operand import Operand
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from osaca.parser.memory import MemoryOperand
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@@ -203,7 +201,10 @@ class MachineModel(object):
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if isinstance(o["base"], dict):
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o["base"] = RegisterOperand(name=o["base"]["name"])
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if isinstance(o["index"], dict):
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o["index"] = RegisterOperand(name=o["index"]["name"],prefix_id=o["index"]["prefix"] if "prefix" in o["index"] else None)
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o["index"] = RegisterOperand(
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name=o["index"]["name"],
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prefix_id=o["index"]["prefix"] if "prefix" in o["index"] else None,
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)
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new_operands.append(
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MemoryOperand(
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base_id=o["base"],
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@@ -494,6 +495,7 @@ class MachineModel(object):
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if isinstance(stream, StringIO):
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return stream.getvalue()
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'''
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def operand_to_dict(self, mem):
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return {
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"base": mem.base,
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@@ -200,7 +200,8 @@ class ISASemantics(object):
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base_name = (o.base.prefix if o.base.prefix is not None else "") + o.base.name
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return {
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base_name: {
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"name": (o.base.prefix if o.base.prefix is not None else "") + o.base.name,
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"name": (o.base.prefix if o.base.prefix is not None else "")
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+ o.base.name,
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"value": o.post_indexed["value"],
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}
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}
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@@ -299,7 +299,11 @@ class KernelDG(nx.DiGraph):
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# write to register -> abort
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if self.is_written(dst, instr_form):
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break
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if not isinstance(dst, Operand) and ("flag" in dst or dst["class"] == "flag" if "class" in dst else False) and flag_dependencies:
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if (
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not isinstance(dst, Operand)
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and ("flag" in dst or dst["class"] == "flag" if "class" in dst else False)
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and flag_dependencies
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):
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# read of flag
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if self.is_read(dst, instr_form):
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yield instr_form, []
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@@ -377,7 +381,9 @@ class KernelDG(nx.DiGraph):
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):
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if isinstance(src, RegisterOperand):
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is_read = self.parser.is_reg_dependend_of(register, src) or is_read
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if not isinstance(src, Operand) and ("flag" in src or src["class"] == "flag" if "class" in src else False):
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if not isinstance(src, Operand) and (
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"flag" in src or src["class"] == "flag" if "class" in src else False
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):
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is_read = self.parser.is_flag_dependend_of(register, src) or is_read
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if isinstance(src, MemoryOperand):
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if src.base is not None:
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@@ -480,7 +486,9 @@ class KernelDG(nx.DiGraph):
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):
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if isinstance(dst, RegisterOperand):
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is_written = self.parser.is_reg_dependend_of(register, dst) or is_written
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if not isinstance(dst, Operand) and ("flag" in dst or dst["class"] == "flag" if "class" in dst else False):
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if not isinstance(dst, Operand) and (
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"flag" in dst or dst["class"] == "flag" if "class" in dst else False
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):
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is_written = self.parser.is_flag_dependend_of(register, dst) or is_written
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if isinstance(dst, MemoryOperand):
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if dst.pre_indexed or dst.post_indexed:
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@@ -230,7 +230,6 @@ class TestCLI(unittest.TestCase):
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osaca.run(args, output_file=output)
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self.assertTrue(output.getvalue().count("WARNING: LCD analysis timed out") == 0)
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def test_lines_arg(self):
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# Run tests with --lines option
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parser = osaca.create_parser()
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