bugfixes for A64FX

osaca/data/a64fx.yml

@@ -24,7 +24,7 @@ load_throughput:
 load_throughput_default: [[1, '56'], [1, ['5D', '6D']]]
 store_throughput: []
 store_throughput_default: [[1, '56'], [1, '7']]
-ports: ['0', 0DV, '1', '2', '3', '4', '5', 5D, '6', 6D, '7', '8']
+ports: ['0', 0DV, '1', '2', '3', '4', '5', 5D, '6', 6D, '7']
 port_model_scheme: |
   +---------------------------------------------------------------------------------+
   |                2 * 10 entry RSA0/1, 2 * 20 entry RSE0/1, 19 entry RSBR          |
@@ -95,19 +95,19 @@ instruction_forms:
   - class: identifier
   throughput: 1.0
   latency: 0.0
-  port_pressure: [[1, '8']]
+  port_pressure: [[1, '7']]
 - name: b.gt
   operands:
   - class: identifier
   throughput: 1.0
   latency: 0.0
-  port_pressure: [[1, '8']]
+  port_pressure: [[1, '7']]
 - name: bne
   operands:
   - class: identifier
   throughput: 1.0
   latency: 0.0
-  port_pressure: [[1, '8']]
+  port_pressure: [[1, '7']]
 - name: cmp
   operands:
   - class: register
@@ -497,8 +497,8 @@ instruction_forms:
     post-indexed: false
     pre-indexed: false
   throughput: 0.5
-  latency: 8.0  # 	2*p56+2*p5D6D
-  port_pressure: [[2, '56'], [2, ['5D', '6D']]]
+  latency: 5.0  # 	1*p56+1*p5D6D
+  port_pressure: [[1, '56'], [1, ['5D', '6D']]]
 - name: ldr
   operands:
   - class: register
@@ -511,8 +511,8 @@ instruction_forms:
     post-indexed: false
     pre-indexed: false
   throughput: 0.5
-  latency: 8.0  # 	2*p56+2*p5D6D
-  port_pressure: [[2, '56'], [2, ['5D', '6D']]]
+  latency: 5.0  # 	2*p56+2*p5D6D
+  port_pressure: [[1, '56'], [1, ['5D', '6D']]]
 - name: ldr
   operands:
   - class: register
@@ -525,8 +525,8 @@ instruction_forms:
     post-indexed: false
     pre-indexed: false
   throughput: 0.5
-  latency: 8.0  # 	2*p56+2*p5D6D
-  port_pressure: [[2, '56'], [2, ['5D', '6D']]]
+  latency: 5.0  # 	1*p56+1*p5D6D
+  port_pressure: [[1, '56'], [1, ['5D', '6D']]]
 - name: ldr
   operands:
   - class: register
@@ -539,8 +539,8 @@ instruction_forms:
     post-indexed: false
     pre-indexed: false
   throughput: 0.5
-  latency: 8.0  # 	2*p56+2*p5D6D
-  port_pressure: [[2, '56'], [2, ['5D', '6D']]]
+  latency: 5.0  # 	1*p56+1*p5D6D
+  port_pressure: [[1, '56'], [1, ['5D', '6D']]]
 - name: ldr
   operands:
   - class: register
@@ -554,7 +554,7 @@ instruction_forms:
     pre-indexed: false
   throughput: 0.5
   latency: 5.0  # 	2*p56+2*p5D6D
-  port_pressure: [[2, '56'], [2, ['5D', '6D']]]
+  port_pressure: [[1, '56'], [1, ['5D', '6D']]]
 - name: ldr
   operands:
   - class: register
@@ -735,7 +735,7 @@ instruction_forms:
     post-indexed: false
   throughput: 1.0
   latency: 0  # 	1*p56+1*p0
-  port_pressure: [[1, '56'], [1, '0']]
+  port_pressure: [[2, '56'], [1, '0']]
 - name: str
   operands:
   - class: register
@@ -764,6 +764,17 @@ instruction_forms:
   throughput: 1.0
   latency: 0  # 	1*p56+1*p3+1*p3456
   port_pressure: [[1, '56'], [1, '3'], [1, '3456']]
+- name: subs
+  operands:
+  - class: register
+    prefix: x
+  - class: register
+    prefix: x
+  - class: immediate
+    imd: int
+  throughput: 0.25
+  latency: 1.0  # 	1*p3456
+  port_pressure: [[1, '3456']]
 - name: sub
   operands:
   - class: register

osaca/data/isa/aarch64.yml

@@ -5,6 +5,16 @@ isa: "AArch64"
 #   mnemonic op1 ... opN
 # means that op1 is the only destination operand and op2 to op(N) are source operands.
 instruction_forms:
+    - name: "cmp"
+      operands:
+        - class: "register"
+          prefix: "x"
+          source: true
+          destination: false
+        - class: "register"
+          prefix: "x"
+          source: true
+          destination: false
     - name: "fmla"
       operands:
         - class: "register"