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added initial support for Intel Ice Lake (ICL)

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This commit is contained in:
JanLJL
2020-06-22 22:15:14 +02:00
parent 94d7d35c0b
commit 379fe80169
2 changed files with 36310 additions and 2 deletions
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36308
osaca/data/icl.yml Normal file
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4
osaca/osaca.py
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@@ -17,7 +17,7 @@ MODULE_DATA_DIR = os.path.join(
)
LOCAL_OSACA_DIR = os.path.join(os.path.expanduser('~') + '/.osaca/')
DATA_DIR = os.path.join(LOCAL_OSACA_DIR, 'data/')
SUPPORTED_ARCHS = ['SNB', 'IVB', 'HSW', 'BDW', 'SKX', 'CSX', 'ZEN1', 'ZEN2', 'TX2']
SUPPORTED_ARCHS = ['SNB', 'IVB', 'HSW', 'BDW', 'SKX', 'CSX', 'ICL', 'ZEN1', 'ZEN2', 'TX2']
# Stolen from pip
@@ -71,7 +71,7 @@ def create_parser(parser=None):
parser.add_argument(
'--arch',
type=str,
help='Define architecture (SNB, IVB, HSW, BDW, SKX, CSX, ZEN1, ZEN2, TX2).',
help='Define architecture (SNB, IVB, HSW, BDW, SKX, CSX, ICL, ZEN1, ZEN2, TX2).',
)
parser.add_argument(
'--fixed',