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added AND instr

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JanLJL
2022-08-31 14:19:23 +02:00
parent 21cfb8d011
commit 3b453de617
1 changed files with 11 additions and 0 deletions
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osaca/data/icx.yml
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@@ -6914,3 +6914,14 @@ instruction_forms:
port_pressure: [[1, '5']] # asmbench
throughput: 1.0 # asmbench
uops: 1 # asmbench
#################################################
- name: AND # model_importer.py instructions.xml ICL
operands: # model_importer.py instructions.xml ICL
- class: immediate # model_importer.py instructions.xml ICL
imd: int # model_importer.py instructions.xml ICL
- class: register # model_importer.py instructions.xml ICL
name: gpr # model_importer.py instructions.xml ICL
latency: 1 # model_importer.py instructions.xml ICL
port_pressure: [[1, '0156']] # model_importer.py instructions.xml ICL
throughput: 0.25 # model_importer.py instructions.xml ICL
uops: 1 # model_importer.py instructions.xml ICL