mirror of
https://github.com/RRZE-HPC/OSACA.git
synced 2025-12-16 00:50:06 +01:00
added ZEN architecture
This commit is contained in:
Jan Laukemann
90
osaca/data/zen_data.csv
Normal file
90
osaca/data/zen_data.csv
Normal file
@@ -0,0 +1,90 @@
|
||||
instr,TP,LT,ports
|
||||
jae-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
ja-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jbe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jb-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jc-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jcxz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jecxz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
je-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jge-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jg-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jle-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jl-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jmp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jmpq-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jnae-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jna-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jnbe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jnb-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jnc-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jne-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jnge-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jng-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jnle-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jnl-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jno-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jno-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jnp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jns-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jns-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jnz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jpe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jpo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
js-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
js-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
jz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
add-r32_imd,0.25,1.0,"(0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
|
||||
add-r64_imd,0.25,1.0,"(0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
|
||||
addl-r32_imd,0.25,1.0,"(0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
|
||||
addq-r64_imd,0.25,1.0,"(0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
|
||||
addl-mem_imd,1.0,7.0,"(0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 1.0, 1.0)"
|
||||
addq-mem_imd,1.0,7.0,"(0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 1.0, 1.0)"
|
||||
add-mem_r32,1.0,7.0,"(0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 1.0, 1.0)"
|
||||
add-mem_r64,1.0,7.0,"(0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 1.0, 1.0)"
|
||||
addl-mem_r32,1.0,7.0,"(0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 1.0, 1.0)"
|
||||
addq-mem_r64,1.0,7.0,"(0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 1.0, 1.0)"
|
||||
cmp-r32_mem,0.5,1.0,"(0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0.5, 0.5)"
|
||||
cmpl-r32_mem,0.5,1.0,"(0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0.5, 0.5)"
|
||||
cmp-r32_r32,0.25,1.0,"(0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
|
||||
cmpl-r32_r32,0.25,1.0,"(0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
|
||||
cmp-r64_imd,0.25,1.0,"(0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
|
||||
cmp-r64_r64,0.25,1.0,"(0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
|
||||
cmpq-r64_imd,0.25,1.0,"(0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
|
||||
cmpq-r64_r64,0.25,1.0,"(0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
|
||||
inc-r64,0.25,1.0,"(0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
|
||||
mov-mem_r64,1.0,4.0,"(0, 0, 0, 0, 0, 0, 0, 0, 1.0, 1.0)"
|
||||
mov-r64_mem,0.5,3.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0.5, 0.5)"
|
||||
mov-r32_mem,0.5,3.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0.5, 0.5)"
|
||||
movq-mem_r64,1.0,4.0,"(0, 0, 0, 0, 0, 0, 0, 0, 1.0, 1.0)"
|
||||
movq-r64_mem,0.5,3.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0.5, 0.5)"
|
||||
movl-r32_mem,0.5,3.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0.5, 0.5)"
|
||||
movslq-r64_r32,0.25,1.0,"(0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
|
||||
sub-r32_imd,0.25,1.0,"(0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
|
||||
vaddpd-ymm_ymm_mem,1.0,3.0,"(0, 0, 1.0, 1.0, 0, 0, 0, 0, 0.5, 0.5)"
|
||||
vaddsd-xmm_xmm_mem,0.5,3.0,"(0, 0, 0.5, 0.5, 0, 0, 0, 0, 0.5, 0.5)"
|
||||
vaddsd-xmm_xmm_xmm,0.5,3.0,"(0, 0, 0.5, 0.5, 0, 0, 0, 0, 0, 0)"
|
||||
vaddss-xmm_xmm_xmm,0.5,3.0,"(0, 0, 0.5, 0.5, 0, 0, 0, 0, 0, 0)"
|
||||
vcvtsi2ss-xmm_xmm_r32,1.0,4.0,"(1.0, 1.0, 1.0, 1.0, 0, 0, 0, 0, 0, 0)"
|
||||
vcvtss2si-r32_xmm,1.0,7.0,"(1.0, 1.0, 1.0, 1.0, 0, 0, 0, 0, 0, 0)"
|
||||
cvtsi2ss-xmm_r32,-1.0,8.0,"(-1)"
|
||||
vfmadd213pd-ymm_ymm_ymm,1.0,5.0,"(1.0, 1.0, 1.0, 1.0, 0, 0, 0, 0, 0, 0)"
|
||||
vfmadd213pd-xmm_xmm_xmm,0.5,5.0,"(0.5, 0.5, 0.5, 0.5, 0, 0, 0, 0, 0, 0)"
|
||||
vfmadd213ps-ymm_ymm_ymm,1.0,5.0,"(1.0, 1.0, 1.0, 1.0, 0, 0, 0, 0, 0, 0)"
|
||||
vfmadd213ps-xmm_xmm_xmm,0.5,5.0,"(0.5, 0.5, 0.5, 0.5, 0, 0, 0, 0, 0, 0)"
|
||||
vfmadd213sd-xmm_xmm_xmm,0.5,5.0,"(0.5, 0.5, 0.5, 0.5, 0, 0, 0, 0, 0, 0)"
|
||||
vfmadd213ss-xmm_xmm_xmm,0.5,5.0,"(0.5, 0.5, 0.5, 0.5, 0, 0, 0, 0, 0, 0)"
|
||||
vinsertf128-ymm_ymm_imd,0.667,1.0,"(-1,)"
|
||||
vmovsd-mem_xmm,1.0,8.0,"(0, 0, 0, 0, 0, 0, 0, 0, 1.0, 1.0)"
|
||||
vmovsd-xmm_mem,0.5,-1,"(0, 0, 0, 0, 0, 0, 0, 0, 0.5, 0.5)"
|
||||
vmulpd-ymm_ymm_ymm,1.0,4.0,"(1.0, 1.0, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
vmulsd-xmm_xmm_mem,0.5,4.0,"(0.5, 0.5, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
vmulsd-xmm_xmm_xmm,0.5,4.0,"(0.5, 0.5, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
vmulss-xmm_xmm_xmm,0.5,3.0,"(0.5, 0.5, 0, 0, 0, 0, 0, 0, 0, 0)"
|
||||
vsubpd-ymm_ymm_mem,1.0,3.0,"(0, 0, 1.0, 1.0, 0, 0, 0, 0, 0, 0)"
|
||||
vsubsd-xmm_xmm_mem,0.5,3.0,"(0, 0, 0.5, 0.5, 0, 0, 0, 0, 0, 0)"
|
||||
vsubsd-xmm_xmm_xmm,0.5,3.0,"(0, 0, 0.5, 0.5, 0, 0, 0, 0, 0, 0)"
|
||||
vsubss-xmm_xmm_xmm,0.5,3.0,"(0, 0, 0.5, 0.5, 0, 0, 0, 0, 0, 0)"
|
||||
|
Can't render this file because it contains an unexpected character in line 80 and column 41.
|
@@ -12,7 +12,7 @@ from osaca.param import Register, MemAddr
|
||||
|
||||
class Scheduler(object):
|
||||
|
||||
arch_dict = {'SNB': 6, 'IVB': 6, 'HSW': 8, 'BDW': 8, 'SKL': 8}
|
||||
arch_dict = {'SNB': 6, 'IVB': 6, 'HSW': 8, 'BDW': 8, 'SKL': 8, 'ZEN': 10}
|
||||
ports = None # type: int
|
||||
instrList = None # type: list<list<str,Param[,Param][,Param],str>>,
|
||||
# content of most inner list in instrList: instr, operand(s), instr form
|
||||
|
||||
@@ -202,7 +202,7 @@ class Osaca(object):
|
||||
False if arch is not supported
|
||||
|
||||
"""
|
||||
arch_list = ['SNB', 'IVB', 'HSW', 'BDW', 'SKL']
|
||||
arch_list = ['SNB', 'IVB', 'HSW', 'BDW', 'SKL', 'ZEN']
|
||||
if(self.arch in arch_list):
|
||||
return True
|
||||
else:
|
||||
|
||||
Reference in New Issue
Block a user