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more tests

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This commit is contained in:
JanLJL
2020-02-20 09:04:39 +01:00
parent 4cdee8b621
commit 5a0365ab35
6 changed files with 58 additions and 8 deletions
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9
tests/test_files/ibench_import_aarch64.dat Normal file
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Using frequency 2.20GHz.
testinstr-i_d_v-TP: 0.501 (clock cycles) [DEBUG - result: 0.007813]
testinstr-i_d_v-LT: 4.013 (clock cycles) [DEBUG - result: 1.000000]
testinstr2-mboi_v-TP: 0.501 (clock cycles) [DEBUG - result: 0.007813]
testinstr2-mboi_v-LT: 4.013 (clock cycles) [DEBUG - result: 1.000000]
testinstr3-mbisr_v-TP: 0.501 (clock cycles) [DEBUG - result: 0.007813]
testinstr3-mbisr_v-LT: 4.013 (clock cycles) [DEBUG - result: 1.000000]
testinstr4-mboisp_v-TP: 0.501 (clock cycles) [DEBUG - result: 0.007813]
testinstr4-mboisp_v-LT: 4.013 (clock cycles) [DEBUG - result: 1.000000]

7
tests/test_files/ibench_import_x86.dat Normal file
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Using frequency 2.50GHz.
testinstr-i_r_x-TP: 0.251 (clock cycles) [DEBUG - result: 0.007813]
testinstr-i_r_x-LT: 4.013 (clock cycles) [DEBUG - result: 1.000000]
testinstr2-mboi_x-TP: 0.501 (clock cycles) [DEBUG - result: 0.007813]
testinstr2-mboi_x-LT: 8.010 (clock cycles) [DEBUG - result: 1.000000]
testinstr3-mbis_y-TP: 0.334 (clock cycles) [DEBUG - result: 0.007813]
testinstr3-mbis_y-LT: 8.010 (clock cycles) [DEBUG - result: 1.000000]