Lerking/OSACA
1
0
Fork 0
mirror of https://github.com/RRZE-HPC/OSACA.git synced 2025-12-15 16:40:05 +01:00
Code Issues Packages Projects Releases Wiki Activity

initial support for SPR

Browse Source
This commit is contained in:
JanLJL
2024-03-06 00:52:06 +01:00
parent 3435641451
commit 764b22cebe
5 changed files with 5952 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files

30
README.rst
View File

@@ -100,7 +100,7 @@ The usage of OSACA can be listed as:
shows the program’s version number.
--arch ARCH
needs to be replaced with the target architecture abbreviation.
Possible options are ``SNB``, ``IVB``, ``HSW``, ``BDW``, ``SKX``, ``CSX``, ``ICL`` (Client), ``ICX`` (Server) for the latest Intel micro architectures starting from Intel Sandy Bridge and ``ZEN1``, ``ZEN2``, and ``ZEN3`` for AMD Zen architectures.
Possible options are ``SNB``, ``IVB``, ``HSW``, ``BDW``, ``SKX``, ``CSX``, ``ICL`` (Client), ``ICX`` (Server), ``SPR`` for the latest Intel micro architectures starting from Intel Sandy Bridge and ``ZEN1``, ``ZEN2``, and ``ZEN3`` for AMD Zen architectures.
Furthermore, ``TX2`` for Marvell`s ARM-based ThunderX2 , ``N1`` for ARM's Neoverse, ``A72`` for ARM Cortex-A72, ``TSV110`` for the HiSilicon TaiShan v110, ``A64FX`` for Fujitsu's HPC ARM architecture, ``M1`` for the Apple M1-Firestorm performance core, and ``V2`` for the Neoverse V2 (used in NVIDIA's Grace CPU) are available.
If no micro-architecture is given, OSACA assumes a default architecture for x86/AArch64.
--fixed
@@ -150,21 +150,23 @@ Supported microarchitectures
| | | Ivy Bridge | ``IVB`` |
| | +----------------+------------+
| | | Haswell | ``HSW`` |
| | Intel +----------------+------------+
| | +----------------+------------+
| | | Broadwell | ``BDW`` |
| +----------------+------------+
| | Skylake-X | ``SKX`` |
| +----------------+------------+
| | Cascadelake-X | ``CSX`` |
| +----------------+------------+
| | Icelake client | ``ICL`` |
| +----------------+------------+
| | Icelake server | ``ICX`` |
| | +----------------+------------+
| | | Skylake-X | ``SKX`` |
| | Intel +----------------+------------+
| | | Cascadelake-X | ``CSX`` |
| | +----------------+------------+
| | | Icelake client | ``ICL`` |
| | +----------------+------------+
| | | Icelake server | ``ICX`` |
| | +----------------+------------+
| | | Sapphire Rapids| ``SPR`` |
+----------+----------------+------------+
| | | Naples / Zen 1 | ``ZEN1`` |
| +----------------+------------+
| | +----------------+------------+
| | AMD | Rome / Zen 2 | ``ZEN2`` |
| +----------------+------------+
| | +----------------+------------+
| | | Milan / Zen 3 | ``ZEN3`` |
+----------+----------------+------------+
@@ -174,9 +176,9 @@ Supported microarchitectures
| Designer | Model/microarch | OSACA flag |
+===========+===================+=============+
| | | Cortex-A72 | ``A72`` |
| +-------------------+-------------+
| | +-------------------+-------------+
| | ARM | Neoverse N1 | ``N1`` |
| +-------------------+-------------+
| | +-------------------+-------------+
| | | Neoverse V2 | ``V2`` |
+-----------+-------------------+-------------+
| Marvell | ThunderX2 | ``TX2`` |