mirror of
https://github.com/RRZE-HPC/OSACA.git
synced 2026-01-05 10:40:06 +01:00
fixed last problems with ibench import
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@@ -52,23 +52,22 @@ def import_benchmark_output(arch, bench_type, filepath):
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with open(filepath, 'r') as f:
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input_data = f.readlines()
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db_entries = None
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mm = MachineModel(arch)
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if bench_type == 'ibench':
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db_entries = _get_ibench_output(input_data)
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db_entries = _get_ibench_output(input_data, mm.get_ISA())
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elif bench_type == 'asmbench':
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raise NotImplementedError
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# write entries to DB
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mm = MachineModel(arch)
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for entry in db_entries:
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mm.set_instruction_entry(entry)
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with open(filepath, 'w') as f:
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mm.dump(f)
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mm.set_instruction_entry(db_entries[entry])
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print(mm.dump())
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##################
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# HELPERS IBENCH #
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##################
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def _get_ibench_output(input_data):
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def _get_ibench_output(input_data, isa):
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db_entries = {}
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for line in input_data:
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if 'Using frequency' in line or len(line) == 0:
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@@ -81,7 +80,7 @@ def _get_ibench_output(input_data):
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else:
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mnemonic = instruction.split('-')[0]
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operands = instruction.split('-')[1].split('_')
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operands = [_create_db_operand(op) for op in operands]
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operands = [_create_db_operand(op, isa) for op in operands]
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entry = {
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'name': mnemonic,
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'operands': operands,
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@@ -107,7 +106,7 @@ def _get_ibench_output(input_data):
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return db_entries
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def _validate_measurement(self, measurement, is_tp):
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def _validate_measurement(measurement, is_tp):
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if not is_tp:
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if (
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math.floor(measurement) * 1.05 >= measurement
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@@ -127,14 +126,14 @@ def _validate_measurement(self, measurement, is_tp):
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return None
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def _create_db_operand(self, operand):
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if self.isa == 'aarch64':
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return self._create_db_operand_aarch64(operand)
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elif self.isa == 'x86':
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return self._create_db_operand_x86(operand)
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def _create_db_operand(operand, isa):
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if isa == 'aarch64':
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return _create_db_operand_aarch64(operand)
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elif isa == 'x86':
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return _create_db_operand_x86(operand)
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def _create_db_operand_aarch64(self, operand):
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def _create_db_operand_aarch64(operand):
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if operand == 'i':
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return {'class': 'immediate', 'imd': 'int'}
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elif operand in 'wxbhsdq':
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@@ -155,7 +154,7 @@ def _create_db_operand_aarch64(self, operand):
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raise ValueError('Parameter {} is not a valid operand code'.format(operand))
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def _create_db_operand_x86(self, operand):
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def _create_db_operand_x86(operand):
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if operand == 'r':
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return {'class': 'register', 'name': 'gpr'}
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elif operand in 'xyz':
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@@ -113,6 +113,7 @@ class Frontend(object):
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def print_combined_view(self, kernel, cp_kernel: KernelDG, dep_dict, show_cmnts=True):
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self._print_header_report()
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self._print_symbol_map()
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print('\n\nCombined Analysis Report\n' + '-----------------------')
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lineno_filler = ' '
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port_len = self._get_max_port_len(kernel)
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# Separator for ports
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@@ -123,7 +124,7 @@ class Frontend(object):
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# for LCD/CP column
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separator += '-' * (2 * 6 + len(col_sep)) + '-' * len(col_sep)
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sep_list = self._get_separator_list(col_sep)
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headline = 'Ports'
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headline = 'Port pressure in cycles'
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headline_str = '{{:^{}}}'.format(len(separator))
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# Prepare CP/LCD variable
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cp_lines = [x['line_number'] for x in cp_kernel]
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@@ -5,9 +5,7 @@ import io
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import os
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import re
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import sys
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from filecmp import dircmp
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from subprocess import call
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import warnings
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from osaca.db_interface import sanity_check, import_benchmark_output
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from osaca.frontend import Frontend
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@@ -198,10 +196,10 @@ def run(args, output_file=sys.stdout):
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# Sanity check on DB
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verbose = True if args.verbose > 0 else False
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sanity_check(args.arch, verbose=verbose)
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if 'import_data' in args:
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elif 'import_data' in args:
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# Import microbench output file into DB
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import_data(args.import_data, args.arch, args.file)
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if args.insert_marker:
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import_data(args.import_data, args.arch, args.file.name)
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elif args.insert_marker:
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# Try to add IACA marker
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insert_byte_marker(args)
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else:
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@@ -9,6 +9,7 @@ from osaca.parser import AttrDict, BaseParser
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class ParserAArch64v81(BaseParser):
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def __init__(self):
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super().__init__()
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self.isa = 'aarch64'
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def construct_parser(self):
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# Comment
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@@ -8,6 +8,7 @@ from osaca.parser import AttrDict, BaseParser
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class ParserX86ATT(BaseParser):
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def __init__(self):
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super().__init__()
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self.isa = 'x86'
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def construct_parser(self):
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decimal_number = pp.Combine(
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@@ -67,8 +68,13 @@ class ParserX86ATT(BaseParser):
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directive_option = pp.Combine(
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pp.Word('#@.', exact=1) + pp.Word(pp.printables, excludeChars=',')
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)
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directive_parameter = (pp.quotedString | directive_option | identifier | hex_number |
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decimal_number | self.register
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directive_parameter = (
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pp.quotedString
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| directive_option
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| identifier
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| hex_number
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| decimal_number
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| self.register
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)
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commaSeparatedList = pp.delimitedList(pp.Optional(directive_parameter), delim=',')
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self.directive = pp.Group(
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@@ -172,9 +178,10 @@ class ParserX86ATT(BaseParser):
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if result is None:
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try:
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result = self.parse_instruction(line)
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except pp.ParseException as e:
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raise ValueError('Could not parse instruction on line {}: {!r}'.format(
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line_number, line))
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except pp.ParseException:
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raise ValueError(
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'Could not parse instruction on line {}: {!r}'.format(line_number, line)
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)
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instruction_form[self.INSTRUCTION_ID] = result[self.INSTRUCTION_ID]
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instruction_form[self.OPERANDS_ID] = result[self.OPERANDS_ID]
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instruction_form[self.COMMENT_ID] = result[self.COMMENT_ID]
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@@ -202,8 +209,9 @@ class ParserX86ATT(BaseParser):
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{
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self.INSTRUCTION_ID: result['mnemonic'],
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self.OPERANDS_ID: operands,
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self.COMMENT_ID:
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' '.join(result[self.COMMENT_ID]) if self.COMMENT_ID in result else None,
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self.COMMENT_ID: ' '.join(result[self.COMMENT_ID])
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if self.COMMENT_ID in result
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else None,
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}
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)
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return return_dict
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@@ -189,9 +189,10 @@ class MachineModel(object):
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# Replace instruction form's port_pressure with styled version for RoundtripDumper
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formatted_instruction_forms = deepcopy(self._data['instruction_forms'])
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for instruction_form in formatted_instruction_forms:
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cs = ruamel.yaml.comments.CommentedSeq(instruction_form['port_pressure'])
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cs.fa.set_flow_style()
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instruction_form['port_pressure'] = cs
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if instruction_form['port_pressure'] is not None:
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cs = ruamel.yaml.comments.CommentedSeq(instruction_form['port_pressure'])
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cs.fa.set_flow_style()
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instruction_form['port_pressure'] = cs
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# Create YAML object
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yaml = self._create_yaml_object()
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@@ -319,14 +319,14 @@ class SemanticsAppender(object):
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def _get_regular_source_x86ATT(self, instruction_form):
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# return all but last operand
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sources = [
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op for op in instruction_form['operands'][0 : len(instruction_form['operands']) - 1]
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op for op in instruction_form['operands'][0:len(instruction_form['operands']) - 1]
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]
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return sources
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def _get_regular_source_AArch64(self, instruction_form):
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# return all but first operand
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sources = [
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op for op in instruction_form['operands'][1 : len(instruction_form['operands'])]
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op for op in instruction_form['operands'][1:len(instruction_form['operands'])]
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]
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return sources
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