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fix bug to support 0x.. and ..R hex values for intel syntax
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@@ -160,12 +160,15 @@ class ParserX86Intel(ParserX86):
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binary_number = pp.Combine(pp.Word("01") + pp.CaselessLiteral("B"))
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binary_number = pp.Combine(pp.Word("01") + pp.CaselessLiteral("B"))
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octal_number = pp.Combine(pp.Word("01234567") + pp.CaselessLiteral("O"))
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octal_number = pp.Combine(pp.Word("01234567") + pp.CaselessLiteral("O"))
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decimal_number = pp.Combine(pp.Optional(pp.Literal("-")) + pp.Word(pp.nums))
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decimal_number = pp.Combine(pp.Optional(pp.Literal("-")) + pp.Word(pp.nums))
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hex_number = pp.Combine(pp.Word(pp.hexnums) + pp.CaselessLiteral("H"))
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hex_number_suffix = pp.Combine(pp.Word(pp.hexnums) + (pp.CaselessLiteral("H") ^ pp.CaselessLiteral("R")))
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hex_number_0x = pp.Combine(
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pp.Optional(pp.Literal("-")) + pp.Literal("0x") + pp.Word(pp.hexnums))
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hex_number = (hex_number_0x ^ hex_number_suffix)
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float_number = pp.Combine(
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float_number = pp.Combine(
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pp.Optional(pp.Literal("-")) + pp.Word(pp.nums) + pp.Word(".", pp.nums)
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pp.Optional(pp.Literal("-")) + pp.Word(pp.nums) + pp.Word(".", pp.nums)
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).setResultsName("value")
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).setResultsName("value")
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integer_number = (
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integer_number = (
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binary_number ^ octal_number ^ decimal_number ^ hex_number
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hex_number ^ binary_number ^ octal_number ^ decimal_number
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).setResultsName("value")
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).setResultsName("value")
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# Comment.
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# Comment.
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@@ -793,8 +796,10 @@ class ParserX86Intel(ParserX86):
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if isinstance(imd.value, str):
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if isinstance(imd.value, str):
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if "." in imd.value:
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if "." in imd.value:
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return float(imd.value)
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return float(imd.value)
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if imd.value.startswith("0x"):
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return int(imd.value, 0)
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# Now parse depending on the base.
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# Now parse depending on the base.
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base = {"B": 2, "O": 8, "H": 16}.get(imd.value[-1], 10)
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base = {"B": 2, "O": 8, "H": 16, "R": 16}.get(imd.value[-1], 10)
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value = 0
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value = 0
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negative = imd.value[0] == "-"
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negative = imd.value[0] == "-"
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positive = imd.value[0] == "+"
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positive = imd.value[0] == "+"
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@@ -103,6 +103,8 @@ class TestParserX86Intel(unittest.TestCase):
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instr12 = "\tvfmadd213sd xmm0, xmm1, QWORD PTR __real@bfc5555555555555"
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instr12 = "\tvfmadd213sd xmm0, xmm1, QWORD PTR __real@bfc5555555555555"
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instr13 = "\tjmp\t$LN18@operator"
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instr13 = "\tjmp\t$LN18@operator"
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instr14 = "vaddsd xmm0, xmm0, QWORD PTR [rdx+8+rax*8]"
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instr14 = "vaddsd xmm0, xmm0, QWORD PTR [rdx+8+rax*8]"
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instr15 = "vextractf128 xmm1, ymm2, 0x2"
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instr16 = "vmovupd xmm0, [rax+123R]"
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parsed_1 = self.parser.parse_instruction(instr1)
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parsed_1 = self.parser.parse_instruction(instr1)
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parsed_2 = self.parser.parse_instruction(instr2)
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parsed_2 = self.parser.parse_instruction(instr2)
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@@ -118,6 +120,8 @@ class TestParserX86Intel(unittest.TestCase):
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parsed_12 = self.parser.parse_instruction(instr12)
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parsed_12 = self.parser.parse_instruction(instr12)
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parsed_13 = self.parser.parse_instruction(instr13)
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parsed_13 = self.parser.parse_instruction(instr13)
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parsed_14 = self.parser.parse_instruction(instr14)
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parsed_14 = self.parser.parse_instruction(instr14)
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parsed_15 = self.parser.parse_instruction(instr15)
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parsed_16 = self.parser.parse_instruction(instr16)
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self.assertEqual(parsed_1.mnemonic, "sub")
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self.assertEqual(parsed_1.mnemonic, "sub")
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self.assertEqual(parsed_1.operands[0], RegisterOperand(name="RSP"))
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self.assertEqual(parsed_1.operands[0], RegisterOperand(name="RSP"))
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@@ -221,6 +225,20 @@ class TestParserX86Intel(unittest.TestCase):
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),
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),
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)
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)
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self.assertEqual(parsed_15.mnemonic, "vextractf128")
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self.assertEqual(parsed_15.operands[0], RegisterOperand(name="XMM1"))
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self.assertEqual(parsed_15.operands[1], RegisterOperand(name="YMM2"))
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self.assertEqual(parsed_15.operands[2], ImmediateOperand(value=2))
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self.assertEqual(parsed_16.mnemonic, "vmovupd")
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self.assertEqual(parsed_16.operands[0], RegisterOperand(name="XMM0"))
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self.assertEqual(
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parsed_16.operands[1],
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MemoryOperand(
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base=RegisterOperand(name="RAX"), offset=ImmediateOperand(value=291)
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),
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)
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def test_parse_line(self):
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def test_parse_line(self):
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line_comment = "; -- Begin main"
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line_comment = "; -- Begin main"
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line_instruction = "\tret\t0"
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line_instruction = "\tret\t0"
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