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JanLJL
2024-09-05 10:41:16 +02:00
parent 8d7e68d6aa
commit e3b5c5195d
3 changed files with 94 additions and 0 deletions
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20
osaca/data/spr.yml
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@@ -1691,6 +1691,26 @@ instruction_forms:
port_pressure: [[1, '78'], [1, '49']] # ./generate_mov_entries.py spr
throughput: 0.5 # ./generate_mov_entries.py spr
uops: 2 # ./generate_mov_entries.py spr
- name: vmovq # ./generate_mov_entries.py spr
operands: # ./generate_mov_entries.py spr
- class: register # ./generate_mov_entries.py spr
name: xmm # ./generate_mov_entries.py spr
- class: register # ./generate_mov_entries.py spr
name: gpr # ./generate_mov_entries.py spr
latency: 3 # ./generate_mov_entries.py spr
port_pressure: [[1, '0']] # ./generate_mov_entries.py spr
throughput: 1.0 # ./generate_mov_entries.py spr
uops: 1 # ./generate_mov_entries.py spr
- name: vmovq # ./generate_mov_entries.py spr
operands: # ./generate_mov_entries.py spr
- class: register # ./generate_mov_entries.py spr
name: gpr # ./generate_mov_entries.py spr
- class: register # ./generate_mov_entries.py spr
name: xmm # ./generate_mov_entries.py spr
latency: 3 # ./generate_mov_entries.py spr
port_pressure: [[1, '5']] # ./generate_mov_entries.py spr
throughput: 1.0 # ./generate_mov_entries.py spr
uops: 1 # ./generate_mov_entries.py spr
- name: vmovq # ./generate_mov_entries.py spr
operands: # ./generate_mov_entries.py spr
- class: register # ./generate_mov_entries.py spr

24
osaca/data/v2.yml
View File

@@ -2791,6 +2791,19 @@ instruction_forms:
throughput: 0.5
latency: 1.0 # 1*p67
port_pressure: [[1, '67']]
- name: [sxtl, sxtl2]
operands:
- class: register
prefix: v
shape: d
width: '*'
- class: register
prefix: v
shape: s
width: '*'
throughput: 0.5
latency: 2.0 # 1*p67
port_pressure: [[1, '67']]
- name: [ubfiz, ubfm, ubfx]
operands:
- class: register
@@ -4647,6 +4660,17 @@ instruction_forms:
throughput: 0.25
latency: 2.0 # 2*p89,10,11
port_pressure: [[1, ['8','9','10','11']]]
- name: [scvtf, ucvtf]
operands:
- class: register
prefix: v
shape: "*"
- class: register
prefix: v
shape: "*"
throughput: 0.5
latency: 3.0
port_pressure: [[1, ['8','10']]]
- name: [scvtf, ucvtf]
operands:
- class: register

50
osaca/data/zen4.yml
View File

@@ -5185,6 +5185,56 @@ instruction_forms:
port_pressure: [[1, ['9','10','11','12']]]
throughput: 0.25
uops: 1
- name: VPBROADCASTQ
operands:
- class: register
name: gpr
- class: register
name: xmm
latency: 6
port_pressure: [[1, ['10']]] #uops.info
throughput: 1.0
uops: 1
- name: VPBROADCASTQ
operands:
- class: register
name: gpr
- class: register
name: ymm
latency: 6
port_pressure: [[1, ['10']]] #uops.info
throughput: 1.0
uops: 1
- name: VPBROADCASTQ
operands:
- class: register
name: gpr
- class: register
name: zmm
latency: 6
port_pressure: [[2, ['10', '11']]] #uops.info
throughput: 1.0
uops: 1
- name: VPBROADCASTD
operands:
- class: register
name: gpr
- class: register
name: xmm
latency: 6
port_pressure: [[2, ['10', '11']]] #uops.info
throughput: 1.0
uops: 2
- name: VPBROADCASTD
operands:
- class: register
name: gpr
- class: register
name: ymm
latency: 6
port_pressure: [[2, ['10', '11']]] #uops.info
throughput: 1.0
uops: 2
- name: VPBROADCASTD
operands:
- class: register