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treating post- and pre-incremeted memory references no longer as src_dst

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the incremented register is now considered src_dst instead
This commit is contained in:
Julian Hammer
2020-10-13 19:25:29 +02:00
parent 3b84efd0dc
commit f0c84c3aee
2 changed files with 11 additions and 102 deletions
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8
osaca/semantics/isa_semantics.py
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@@ -103,14 +103,14 @@ class ISASemantics(object):
if ('post_indexed' in operand['memory'] and operand['memory']['post_indexed']) or (
'pre_indexed' in operand['memory'] and operand['memory']['pre_indexed']
):
op_dict['source'].remove(operand)
op_dict['src_dst'].append(operand)
op_dict['src_dst'].append(AttrDict.convert_dict(
{'register': operand['memory']['base']}))
for operand in [op for op in op_dict['destination'] if 'memory' in op]:
if ('post_indexed' in operand['memory'] and operand['memory']['post_indexed']) or (
'pre_indexed' in operand['memory'] and operand['memory']['pre_indexed']
):
op_dict['destination'].remove(operand)
op_dict['src_dst'].append(operand)
op_dict['src_dst'].append(AttrDict.convert_dict(
{'register': operand['memory']['base']}))
# store operand list in dict and reassign operand key/value pair
instruction_form['semantic_operands'] = AttrDict.convert_dict(op_dict)
# assign LD/ST flags