mirror of
https://github.com/RRZE-HPC/OSACA.git
synced 2026-01-06 19:20:07 +01:00
DB updates
This commit is contained in:
@@ -2362,6 +2362,14 @@ instruction_forms:
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port_pressure: [[1, ['0','1','5','6','10']]] # ibench
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throughput: 0.20 # ibench
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uops: 1 # ibench
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- name: neg # ibench
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operands: # ibench
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- class: register # ibench
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name: gpr # ibench
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latency: 1 # ibench
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port_pressure: [[1, ['0','1','5','6','10']]] # ibench
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throughput: 0.2 # ibench
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uops: 1 # ibench
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- name: addpd # ibench
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operands: # ibench
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- class: register # ibench
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@@ -2558,6 +2566,16 @@ instruction_forms:
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port_pressure: [[1, ['0','1','5','6','10']]] # ibench
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throughput: 0.20 # ibench
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uops: 1 # ibench
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- name: imul # ibench
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operands: # ibench
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- class: register # ibench
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name: gpr # ibench
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- class: register # ibench
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name: gpr # ibench
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latency: 3 # ibench
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port_pressure: [[1, '1']] # ibench
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throughput: 1.00 # ibench
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uops: 1 # ibench
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- name: vaddpd # ibench
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operands: # ibench
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- class: register # ibench
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@@ -3542,7 +3560,7 @@ instruction_forms:
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index: "*" # ibench
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scale: "*" # ibench
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latency: 0 # ibench
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port_pressure: [[1, '0'], [1, '01'], [1, '0156'], [8, '78'], [8, '49']] # ibench
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port_pressure: [[1, '0'], [1, '01'], [1, ['0','1','5','6','10']], [8, '78'], [8, '49']] # ibench
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throughput: 4.0 # ibench
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uops: 8 # ibench
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- name: [vscatterdpd, vscatterqpd] # with store # ibench
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@@ -3555,7 +3573,7 @@ instruction_forms:
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index: "*" # ibench
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scale: "*" # ibench
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latency: 0 # ibench
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port_pressure: [[1, '0'], [1, '01'], [1, '0156'], [10, '78'], [10, '49']] # ibench
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port_pressure: [[1, '0'], [1, '01'], [1, ['0','1','5','6','10']], [10, '78'], [10, '49']] # ibench
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throughput: 5.0 # ibench
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uops: 12 # ibench
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- name: [vscatterdpd, vscatterqpd] # with store # ibench
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@@ -3568,7 +3586,7 @@ instruction_forms:
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index: "*" # ibench
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scale: "*" # ibench
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latency: 0 # ibench
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port_pressure: [[2, '0'], [1, '0156'], [14, '78'], [14, '49']] # ibench
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port_pressure: [[2, '0'], [1, ['0','1','5','6','10']], [14, '78'], [14, '49']] # ibench
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throughput: 7.0 # ibench
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uops: 20 # ibench
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- name: vscatterdps # with store # ibench
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@@ -3581,7 +3599,7 @@ instruction_forms:
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index: "*" # ibench
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scale: "*" # ibench
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latency: 0 # ibench
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port_pressure: [[1, '0'], [1, '01'], [1, '0156'], [10, '78'], [10, '49']] # ibench
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port_pressure: [[1, '0'], [1, '01'], [1, ['0','1','5','6','10']], [10, '78'], [10, '49']] # ibench
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throughput: 5.0 # ibench
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uops: 12 # ibench
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- name: vscatterdps # with store # ibench
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@@ -3594,7 +3612,7 @@ instruction_forms:
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index: "*" # ibench
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scale: "*" # ibench
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latency: 0 # ibench
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port_pressure: [[1, '0'], [1, '01'], [1, '0156'], [14, '78'], [14, '49']] # ibench
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port_pressure: [[1, '0'], [1, '01'], [1, ['0','1','5','6','10']], [14, '78'], [14, '49']] # ibench
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throughput: 7.0 # ibench
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uops: 20 # ibench
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- name: vscatterdps # with store # ibench
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@@ -3607,7 +3625,7 @@ instruction_forms:
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index: "*" # ibench
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scale: "*" # ibench
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latency: 0 # ibench
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port_pressure: [[2, '0'], [1, '0156'], [22, '78'], [22, '49']] # ibench
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port_pressure: [[2, '0'], [1, ['0','1','5','6','10']], [22, '78'], [22, '49']] # ibench
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throughput: 11.0 # ibench
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uops: 36 # ibench
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- name: vmulpd # ibench
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@@ -4174,7 +4192,7 @@ instruction_forms:
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- class: register
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name: gpr
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latency: 1
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port_pressure: [[1, ['0','1','5','6','11']]]
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port_pressure: [[1, ['0','1','5','6','10']]]
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throughput: 0.20
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uops: 1
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- name: vcvtdq2pd # uops.info
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@@ -4343,7 +4361,7 @@ instruction_forms:
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- class: register # uops.info
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name: gpr # uops.info
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latency: 1 # uops.info
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port_pressure: [[1, ['0','1','5','6','11']]] # uops.info
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port_pressure: [[1, ['0','1','5','6','10']]] # uops.info
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throughput: 0.2 # uops.info
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uops: 1 # uops.info
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- name: [shl, shr, sal, sar] # uops.info
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@@ -5514,7 +5532,7 @@ instruction_forms:
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- class: register
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name: gpr
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latency: 1
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port_pressure: [[1, ['0','1','5','6','11']]]
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port_pressure: [[1, ['0','1','5','6','10']]]
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throughput: 0.20
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uops: 1
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- name: [AND, OR, XOR, TEST]
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@@ -5524,7 +5542,7 @@ instruction_forms:
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- class: register
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name: gpr
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latency: 1
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port_pressure: [[1, ['0','1','5','6','11']]]
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port_pressure: [[1, ['0','1','5','6','10']]]
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throughput: 0.20
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uops: 1
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- name: NOT
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@@ -5532,7 +5550,7 @@ instruction_forms:
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- class: register
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name: gpr
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latency: 1
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port_pressure: [[1, ['0','1','5','6','11']]]
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port_pressure: [[1, ['0','1','5','6','10']]]
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throughput: 0.20
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uops: 1
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- name: RET
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@@ -5607,7 +5625,7 @@ instruction_forms:
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- class: register
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name: xmm
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latency: 1
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port_pressure: [[1, ['0','1','5','6','11']]]
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port_pressure: [[1, ['0','1','5','6','10']]]
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throughput: 0.20
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uops: 1
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- name: VXORPD
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@@ -5619,7 +5637,7 @@ instruction_forms:
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- class: register
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name: ymm
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latency: 1
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port_pressure: [[1, ['0','1','5','6','11']]]
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port_pressure: [[1, ['0','1','5','6','10']]]
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throughput: 0.20
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uops: 1
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- name: VXORPS
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@@ -5631,7 +5649,7 @@ instruction_forms:
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- class: register
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name: xmm
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latency: 1
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port_pressure: [[1, ['0','1','5','6','11']]]
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port_pressure: [[1, ['0','1','5','6','10']]]
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throughput: 0.20
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uops: 1
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- name: VXORPS
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@@ -5643,7 +5661,7 @@ instruction_forms:
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- class: register
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name: ymm
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latency: 1
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port_pressure: [[1, ['0','1','5','6','11']]]
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port_pressure: [[1, ['0','1','5','6','10']]]
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throughput: 0.20
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uops: 1
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- name: VPBROADCASTD
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@@ -5769,7 +5787,7 @@ instruction_forms:
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- class: register
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name: xmm
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latency: 1
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port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]
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port_pressure: [[1, ['0', '1', '5', '6', '10']]]
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throughput: 0.2
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uops: 1.0
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- name: vmov
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@@ -5779,7 +5797,7 @@ instruction_forms:
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- class: register
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name: xmm
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latency: 1
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port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]
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port_pressure: [[1, ['0', '1', '5', '6', '10']]]
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throughput: 0.2
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uops: 1.0
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- name: [vpor, vpxor, vpord, vpxord]
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