Commit Graph

19 Commits

Author SHA1 Message Date
JanLJL
1b40c10a1f applied flake8 and black rules 2021-08-26 16:58:19 +02:00
JanLJL
5038ce7a15 changed immediate type from str to int 2021-05-10 01:12:30 +02:00
Julian Hammer
781b8b6b89 improved register range and list support on AArch64 2021-04-23 13:12:18 +02:00
Julian
04836cf3f9 Validation (#71)
Validating of OSACA predictions for IVB, SKX, ZEN1, ZEN2, A64FX and TX2 with different kernels.

build_and_run.py contains the configuration used at RRZE's testcluster and UR's qpace4, Analysis.ipynb contains the analysis script and results. Raw data from measurements (122MB) will be attached to next OSACA release.

For now, find the raw data here: https://hawo.net/~sijuhamm/d/UPIhBOtz/validation-data.tar.gz

The analysis report can be viewed at https://nbviewer.jupyter.org/github/RRZE-HPC/OSACA/blob/validation/validation/Analysis.ipynb

Quite a few changes on OSACA included:

Feature: register change tracking via semantic understanding of operations
Feature: recording LCD latency along path and exposing this to frontend
Feature: support for memory reference aliases
Feature: store throughput scaling (similar to load throughput scaling)
Fix: model importer works with latest uops.info export
Fix: immediate type tracking on ARM now preserves type in internal representaion
Removed unused KerncraftAPI
2021-04-15 14:42:37 +02:00
Julian Hammer
afa607e546 migrate code style to Black 2021-03-11 12:02:45 +01:00
Julian Hammer
e29cfb3185 new caching structure with support for distribution 2020-10-28 16:29:55 +01:00
Julian
e159fc938f Merge pull request #51 from RRZE-HPC/A64FX
A64FX support and several Arm bugfixes and enhancements including better TP scheduling
2020-10-16 10:44:47 +02:00
Julian Hammer
f0c84c3aee treating post- and pre-incremeted memory references no longer as src_dst
the incremented register is now considered src_dst instead
2020-10-13 19:25:29 +02:00
JanLJL
7bc39c1343 prepared for aarch64 8.2 support 2020-07-23 15:54:54 +02:00
JanLJL
68964bb2a1 enhanced TP scheduling 2020-07-06 18:49:46 +02:00
JanLJL
9318181902 added reg-only fallback for mem-instructions not found in ISA DB 2020-03-10 17:15:57 +01:00
JanLJL
52ca93ad03 added documentation 2020-03-09 16:35:06 +01:00
JanLJL
2c2e381278 supports hidden operands now (for flags or special instructions) 2020-01-14 20:54:00 +01:00
JanLJL
dce0b8e753 adjusted for mem wildcards in AArch64 ISA DB 2020-01-10 14:38:17 +01:00
JanLJL
e250f69821 added --ignore-unknown flag and major updates in x86 parser 2020-01-09 17:57:08 +01:00
Julian Hammer
63ca1e66bf FIX #46 untangled semantic and non-semantic operand info 2019-11-14 16:43:33 +01:00
Julian Hammer
261575417e added list processing function 2019-10-30 09:31:01 +01:00
JanLJL
ab12fa6d92 bugfix in imports 2019-10-29 09:15:54 +01:00
JanLJL
d1204f7e9d separated SemanticsAppender into ISA and Arch semantics 2019-10-29 09:09:52 +01:00