14 Commits

Author	SHA1	Message	Date
Julian Hammer	9d2ea8603f	new caching structure with support for distribution	2020-10-28 16:29:55 +01:00
Julian	dd59af16b2	Merge pull request #51 from RRZE-HPC/A64FX ... A64FX support and several Arm bugfixes and enhancements including better TP scheduling	2020-10-16 10:44:47 +02:00
Julian Hammer	d03398ddf9	treating post- and pre-incremeted memory references no longer as src_dst ... the incremented register is now considered src_dst instead	2020-10-13 19:25:29 +02:00
JanLJL	6c72281d65	prepared for aarch64 8.2 support	2020-07-23 15:54:54 +02:00
JanLJL	0e77b7bc9a	enhanced TP scheduling	2020-07-06 18:49:46 +02:00
JanLJL	666512d54d	added reg-only fallback for mem-instructions not found in ISA DB	2020-03-10 17:15:57 +01:00
JanLJL	4e73e24b99	added documentation	2020-03-09 16:35:06 +01:00
JanLJL	76469f7898	supports hidden operands now (for flags or special instructions)	2020-01-14 20:54:00 +01:00
JanLJL	cafe4c5bf8	adjusted for mem wildcards in AArch64 ISA DB	2020-01-10 14:38:17 +01:00
JanLJL	3ca2586bac	added --ignore-unknown flag and major updates in x86 parser	2020-01-09 17:57:08 +01:00
Julian Hammer	f18a48653f	FIX #46 untangled semantic and non-semantic operand info	2019-11-14 16:43:33 +01:00
Julian Hammer	a91413c270	added list processing function	2019-10-30 09:31:01 +01:00
JanLJL	15da6044dd	bugfix in imports	2019-10-29 09:15:54 +01:00
JanLJL	0f5d3a0370	separated SemanticsAppender into ISA and Arch semantics	2019-10-29 09:09:52 +01:00