Metehan Dundar ebf76caa18 Apply selected improvements from 1ceac6e: enhanced RISC-V parser, ImmediateOperand enhancements, and rv6→rv64 file renames ...

- Enhanced ImmediateOperand with reloc_type and symbol attributes for better RISC-V support
- Updated RISC-V parser with relocation type support (%hi, %lo, %pcrel_hi, etc.)
- Renamed example files from rv6 to rv64 for consistency
- Updated related configuration and test files
- All 115 tests pass successfully

2025-07-11 18:15:51 +02:00

..

test_files

Merge branch 'master' into dev/risc-v

2025-05-08 12:23:22 +02:00

__init__.py

made tests a module

2019-10-25 14:49:21 +02:00

all_tests.py

RISC-V: Update parser to use x-register names, add vector and FP instructions, fix tests

2025-06-30 00:28:52 +02:00

test_base_parser.py

RISC-V: Update parser to use x-register names, add vector and FP instructions, fix tests

2025-06-30 00:28:52 +02:00

test_cli.py

Apply selected improvements from 1ceac6e: enhanced RISC-V parser, ImmediateOperand enhancements, and rv6→rv64 file renames

2025-07-11 18:15:51 +02:00

test_db_interface.py

RISC-V: Update parser to use x-register names, add vector and FP instructions, fix tests

2025-06-30 00:28:52 +02:00

test_frontend.py

RISC-V: Update parser to use x-register names, add vector and FP instructions, fix tests

2025-06-30 00:28:52 +02:00

test_marker_utils.py

RISC-V: Update parser to use x-register names, add vector and FP instructions, fix tests

2025-06-30 00:28:52 +02:00

test_parser_AArch64.py

added support for <Xd>! registers and [<Xd>]! mem addresses in Arm

2025-03-07 11:49:14 +01:00

test_parser_RISCV.py

Apply selected improvements from 1ceac6e: enhanced RISC-V parser, ImmediateOperand enhancements, and rv6→rv64 file renames

2025-07-11 18:15:51 +02:00

test_parser_x86att.py

formatting

2024-08-19 15:52:28 +02:00

test_parser_x86intel.py

take +- operator of offset/index in mem-addr into account

2025-03-14 18:46:12 +01:00

test_semantics.py

Fix the x86 ISA description to indicate that the register of SAR and SAL is read/write.

2025-03-27 22:47:32 +01:00