JanLJL bc91ab3b70 Merge branch 'master' of github.com:RRZE-HPC/OSACA

2026-01-23 12:42:27 +01:00

..

data

fixed wrong port assignment

2026-01-22 17:14:01 +01:00

parser

Merge branch 'master' of github.com:RRZE-HPC/OSACA

2026-01-23 12:42:27 +01:00

semantics

fixed bug in DFS for instruction forms with multiple port_pressure assignments + test

2026-01-22 17:56:16 +01:00

__init__.py

version bump

2025-09-08 16:36:20 +02:00

__main__.py

added __main__.py

2020-11-09 08:27:31 +01:00

db_interface.py

moved get_full_instruction_name() from HardwareModel to DBInterface

2024-05-02 16:25:41 +02:00

frontend.py

Skip non-integer line numbers in frontend

2025-03-31 22:44:57 +02:00

osaca.py

Add second semantics.assign_optimal_throughput() call

2026-01-23 12:40:45 +01:00

utils.py

applied flake8 and black rules

2021-08-26 16:58:19 +02:00