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ibench
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JanLJL
072ec2a363
enhanced RISC benchmarks
2025-09-02 11:46:30 +02:00
src
enhanced RISC benchmarks
2025-09-02 11:46:30 +02:00
create_benchmarks.py
moved benchmark creation from OSACA to ibench
2019-10-24 10:52:30 +02:00
ibench.c
remove immintrin.h header
2017-05-29 04:25:58 -07:00
include_ARMCLANG.mk
merged all local versions to one and did some refactoring
2025-01-30 15:57:02 +01:00
include_ARMGCC.mk
fixed bugs in ARM benchmark files
2025-02-03 19:08:00 +01:00
include_GCC.mk
some RISC-V instructions
2025-08-12 17:52:43 +02:00
include_ICC.mk
merged all local versions to one and did some refactoring
2025-01-30 15:57:02 +01:00
include_ICX.mk
merged all local versions to one and did some refactoring
2025-01-30 15:57:02 +01:00
Makefile
merged all local versions to one and did some refactoring
2025-01-30 15:57:02 +01:00
README.md
Initial commit
2017-05-19 10:02:29 +02:00
README.md
ibench
Measure instruction latency and throughput
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Description
Measure instruction latency and throughput
Readme
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Python
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C
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Makefile
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