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stm32/boards/STM32H747I_DISCO: Add STM32H747I-DISCO board definition.
Adds support for STM32H747I-DISCO evaluation board with: - STM32H747XI dual-core MCU (Cortex-M7 @ 400MHz + Cortex-M4) - 32MB SDRAM (32-bit bus @ 120MHz) - 32MB QSPI flash storage (MT25QL512ABB dual) - USB High-Speed via ULPI PHY (USB3320C-EZK) - USART1 console via ST-LINK V3 VCP - 10/100 Ethernet (LAN8742A RMII) - requires hardware modification - microSD card slot (8-bit SDMMC1) - 4 LEDs and user button - OpenAMP support for M7-M4 communication Software configuration: - RTC uses LSE (32.768kHz crystal) - lwIP networking stack with SSL/TLS (mbedTLS) - exFAT filesystem support Known limitations: - Ethernet requires hardware modification (ETH_MDC/SAI4_D1 pin conflict) Signed-off-by: Andrew Leech <andrew.leech@planetinnovation.com.au>
This commit is contained in:
Andrew Leech
committed by
Damien George
Damien George
parent
8a56be6660
commit
06f27ec853
@@ -0,0 +1,45 @@
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2025 Andrew Leech
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "storage.h"
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#include "qspi.h"
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#if MICROPY_HW_SPIFLASH_ENABLE_CACHE
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// Shared cache for QSPI block device
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static mp_spiflash_cache_t spi_bdev_cache;
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#endif
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// External QSPI flash uses hardware QSPI interface
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const mp_spiflash_config_t spiflash_config = {
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.bus_kind = MP_SPIFLASH_BUS_QSPI,
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.bus.u_qspi.data = NULL,
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.bus.u_qspi.proto = &qspi_proto,
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#if MICROPY_HW_SPIFLASH_ENABLE_CACHE
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.cache = &spi_bdev_cache,
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#endif
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};
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spi_bdev_t spi_bdev;
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@@ -0,0 +1,23 @@
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{
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"deploy": [
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"../deploy.md"
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],
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"docs": "",
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"features": [
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"DAC",
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"Dual-core",
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"Ethernet",
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"External Flash",
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"External RAM",
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"microSD",
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"USB"
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],
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"images": [
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"stm32h747i_disco.jpg"
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],
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"mcu": "stm32h7",
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"product": "Discovery Kit H747I",
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"thumbnail": "",
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"url": "https://www.st.com/en/evaluation-tools/stm32h747i-disco.html",
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"vendor": "ST Microelectronics"
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}
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@@ -0,0 +1,8 @@
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The Ethernet interface requires a hardware modification due to a pin conflict
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between ETH_MDC (PC1) and the SAI4_D1 digital MEMS microphone. To enable
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Ethernet, the MEMS microphone must be disconnected from PC1. See the
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STM32H747I-DISCO user manual (UM2411) for modification details.
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The board includes additional hardware not currently configured in MicroPython:
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4" LCD touchscreen (DSI), camera connector (DCMI), WM8994 audio codec, and
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digital MEMS microphones.
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@@ -0,0 +1,71 @@
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2025 Andrew Leech
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
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* copies of the Software, and to permit persons to whom the Software is
|
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "py/mphal.h"
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#include "storage.h"
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#include "sdram.h"
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#include "qspi.h"
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// Micron MT25QL flash on STM32H747I-DISCO (single bank, BK1)
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static const mp_spiflash_chip_params_t chip_params_mt25ql = {
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.jedec_id = 0,
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.memory_size_bytes_log2 = MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2 - 3,
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.qspi_prescaler = MICROPY_HW_QSPI_PRESCALER,
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.qread_num_dummy = MICROPY_HW_QSPIFLASH_DUMMY_CYCLES,
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};
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void DISCO_board_early_init(void) {
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HAL_InitTick(0);
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MICROPY_HW_BDEV_SPIFLASH->spiflash.chip_params = &chip_params_mt25ql;
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}
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void DISCO_board_low_power(int mode) {
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switch (mode) {
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case 0: // Leave stop mode.
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sdram_leave_low_power();
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break;
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case 1: // Enter stop mode.
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sdram_enter_low_power();
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break;
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case 2: // Enter standby mode.
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sdram_enter_power_down();
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break;
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}
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// Enable QSPI deepsleep for modes 1 and 2
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mp_spiflash_deepsleep(&spi_bdev.spiflash, (mode != 0));
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#if defined(M4_APP_ADDR)
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// Signal Cortex-M4 to go to Standby mode.
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if (mode == 2) {
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__HAL_RCC_HSEM_CLK_ENABLE();
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HAL_HSEM_FastTake(0);
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HAL_HSEM_Release(0, 0);
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__HAL_RCC_HSEM_CLK_DISABLE();
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HAL_Delay(100);
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}
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#endif
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}
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@@ -0,0 +1,8 @@
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include("$(PORT_DIR)/boards/manifest.py")
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# Networking
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require("bundle-networking")
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# Utils
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require("time")
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require("logging")
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@@ -0,0 +1,275 @@
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#define MICROPY_HW_BOARD_NAME "STM32H747I-DISCO"
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#define MICROPY_HW_MCU_NAME "STM32H747"
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#define MICROPY_FATFS_EXFAT (1)
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#define MICROPY_HW_ENABLE_RTC (1)
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#define MICROPY_HW_ENABLE_RNG (1)
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#define MICROPY_HW_ENABLE_ADC (1)
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#define MICROPY_HW_ENABLE_DAC (1)
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#define MICROPY_HW_ENABLE_USB (1)
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#define MICROPY_HW_HAS_SWITCH (1)
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#define MICROPY_HW_HAS_FLASH (1)
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#define MICROPY_HW_ENABLE_SDCARD (1)
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#define MICROPY_GC_SPLIT_HEAP (1)
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// Flash storage config (external QSPI flash)
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#define MICROPY_HW_SPIFLASH_ENABLE_CACHE (1)
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#define MICROPY_HW_SPIFLASH_SOFT_RESET (1)
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#define MICROPY_HW_SPIFLASH_CHIP_PARAMS (1)
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#define MICROPY_HW_QSPIFLASH_DUMMY_CYCLES (4)
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#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (0)
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#define MICROPY_BOARD_EARLY_INIT DISCO_board_early_init
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void DISCO_board_early_init(void);
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void DISCO_board_low_power(int mode);
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#define MICROPY_BOARD_LEAVE_STOP DISCO_board_low_power(0);
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#define MICROPY_BOARD_ENTER_STOP DISCO_board_low_power(1);
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#define MICROPY_BOARD_ENTER_STANDBY DISCO_board_low_power(2);
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// PLL1 400MHz/50MHz for system and SDMMC
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// HSE is 25MHz
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#define MICROPY_HW_CLK_PLLM (5)
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#define MICROPY_HW_CLK_PLLN (160)
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#define MICROPY_HW_CLK_PLLP (2)
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#define MICROPY_HW_CLK_PLLQ (8)
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#define MICROPY_HW_CLK_PLLR (2)
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#define MICROPY_HW_CLK_PLLVCI (RCC_PLL1VCIRANGE_2)
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#define MICROPY_HW_CLK_PLLVCO (RCC_PLL1VCOWIDE)
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#define MICROPY_HW_CLK_PLLFRAC (0)
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// PLL2 240MHz for FMC and QSPI
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#define MICROPY_HW_CLK_PLL2M (5)
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#define MICROPY_HW_CLK_PLL2N (96)
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#define MICROPY_HW_CLK_PLL2P (2)
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#define MICROPY_HW_CLK_PLL2Q (2)
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#define MICROPY_HW_CLK_PLL2R (10)
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#define MICROPY_HW_CLK_PLL2VCI (RCC_PLL2VCIRANGE_2)
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#define MICROPY_HW_CLK_PLL2VCO (RCC_PLL2VCOWIDE)
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#define MICROPY_HW_CLK_PLL2FRAC (0)
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// PLL3 for USB and other peripherals
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#define MICROPY_HW_CLK_PLL3M (5)
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#define MICROPY_HW_CLK_PLL3N (96)
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#define MICROPY_HW_CLK_PLL3P (8)
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#define MICROPY_HW_CLK_PLL3Q (8)
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#define MICROPY_HW_CLK_PLL3R (4)
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#define MICROPY_HW_CLK_PLL3VCI (RCC_PLL3VCIRANGE_2)
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#define MICROPY_HW_CLK_PLL3VCO (RCC_PLL3VCOWIDE)
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#define MICROPY_HW_CLK_PLL3FRAC (0)
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// HSE in bypass mode (25MHz oscillator)
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#define MICROPY_HW_CLK_USE_BYPASS (1)
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// Bus clock divider values
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#define MICROPY_HW_CLK_AHB_DIV (RCC_HCLK_DIV2)
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#define MICROPY_HW_CLK_APB1_DIV (RCC_APB1_DIV2)
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#define MICROPY_HW_CLK_APB2_DIV (RCC_APB2_DIV2)
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#define MICROPY_HW_CLK_APB3_DIV (RCC_APB3_DIV2)
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#define MICROPY_HW_CLK_APB4_DIV (RCC_APB4_DIV2)
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// Peripheral clock sources
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#define MICROPY_HW_RCC_HSI48_STATE (RCC_HSI48_ON)
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#define MICROPY_HW_RCC_USB_CLKSOURCE (RCC_USBCLKSOURCE_PLL3)
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#define MICROPY_HW_RCC_FMC_CLKSOURCE (RCC_FMCCLKSOURCE_PLL2)
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#define MICROPY_HW_RCC_RNG_CLKSOURCE (RCC_RNGCLKSOURCE_HSI48)
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#define MICROPY_HW_RCC_ADC_CLKSOURCE (RCC_ADCCLKSOURCE_PLL3)
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#define MICROPY_HW_RCC_SDMMC_CLKSOURCE (RCC_SDMMCCLKSOURCE_PLL)
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#define MICROPY_HW_RCC_FDCAN_CLKSOURCE (RCC_FDCANCLKSOURCE_PLL)
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#define MICROPY_HW_RCC_QSPI_CLKSOURCE (RCC_QSPICLKSOURCE_PLL2)
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// SMPS configuration
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#define MICROPY_HW_PWR_SMPS_CONFIG (PWR_DIRECT_SMPS_SUPPLY)
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// Configure the analog switches for dual-pad pins
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#define MICROPY_HW_ANALOG_SWITCH_PA0 (SYSCFG_SWITCH_PA0_OPEN)
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#define MICROPY_HW_ANALOG_SWITCH_PA1 (SYSCFG_SWITCH_PA1_OPEN)
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#define MICROPY_HW_ANALOG_SWITCH_PC2 (SYSCFG_SWITCH_PC2_OPEN)
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#define MICROPY_HW_ANALOG_SWITCH_PC3 (SYSCFG_SWITCH_PC3_OPEN)
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// Using LSE for RTC (32.768kHz crystal on PC14/PC15)
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#define MICROPY_HW_RTC_USE_LSE (1)
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#define MICROPY_HW_RTC_USE_US (1)
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#define MICROPY_HW_RTC_USE_CALOUT (0)
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// QSPI flash for storage (single bank, dual-flash mode disabled in driver)
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#define MICROPY_HW_QSPI_PRESCALER (2) // 120MHz
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#define MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2 (27) // 128Mbit = 16MB (single MT25QL bank)
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#define MICROPY_HW_SPIFLASH_SIZE_BITS (128 * 1024 * 1024)
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#define MICROPY_HW_QSPIFLASH_CS (pyb_pin_QSPI_BK1_NCS)
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#define MICROPY_HW_QSPIFLASH_SCK (pyb_pin_QSPI_CLK)
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#define MICROPY_HW_QSPIFLASH_IO0 (pyb_pin_QSPI_BK1_IO0)
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#define MICROPY_HW_QSPIFLASH_IO1 (pyb_pin_QSPI_BK1_IO1)
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#define MICROPY_HW_QSPIFLASH_IO2 (pyb_pin_QSPI_BK1_IO2)
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#define MICROPY_HW_QSPIFLASH_IO3 (pyb_pin_QSPI_BK1_IO3)
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// SPI flash block device config
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extern const struct _mp_spiflash_config_t spiflash_config;
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extern struct _spi_bdev_t spi_bdev;
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#define MICROPY_HW_BDEV_SPIFLASH (&spi_bdev)
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#define MICROPY_HW_BDEV_SPIFLASH_CONFIG (&spiflash_config)
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#define MICROPY_HW_BDEV_SPIFLASH_SIZE_BYTES (MICROPY_HW_SPIFLASH_SIZE_BITS / 8)
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#define MICROPY_HW_BDEV_SPIFLASH_EXTENDED (&spi_bdev)
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// Flash latency
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#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_2
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// UART config (directly accessible on Arduino header pins)
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#define MICROPY_HW_UART1_TX (pyb_pin_UART1_TX)
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#define MICROPY_HW_UART1_RX (pyb_pin_UART1_RX)
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// UART REPL disabled to avoid slowing USB HS REPL throughput
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// #define MICROPY_HW_UART_REPL PYB_UART_1
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// #define MICROPY_HW_UART_REPL_BAUD 115200
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#define MICROPY_HW_UART8_TX (pin_J8)
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#define MICROPY_HW_UART8_RX (pin_J9)
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// I2C buses
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#define MICROPY_HW_I2C4_SCL (pin_D12)
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#define MICROPY_HW_I2C4_SDA (pin_D13)
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// SPI config
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#define MICROPY_HW_SPI5_NSS (pin_K1)
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#define MICROPY_HW_SPI5_SCK (pin_K0)
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#define MICROPY_HW_SPI5_MISO (pin_J11)
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#define MICROPY_HW_SPI5_MOSI (pin_J10)
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// USRSW is pulled high. Pressing the button makes the input go high.
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#define MICROPY_HW_USRSW_PIN (pin_C13)
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#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL)
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#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING)
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#define MICROPY_HW_USRSW_PRESSED (1)
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// LEDs
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#define MICROPY_HW_LED1 (pin_I12) // green
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#define MICROPY_HW_LED2 (pin_I13) // orange
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#define MICROPY_HW_LED3 (pin_I14) // red
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#define MICROPY_HW_LED4 (pin_I15) // blue
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#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_low(pin))
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#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_high(pin))
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// USB config - Use High-Speed via ULPI PHY
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#define MICROPY_HW_USB_HS (1)
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#define MICROPY_HW_USB_HS_ULPI (1)
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#define MICROPY_HW_USB_HS_ULPI_NXT (pyb_pin_USB_HS_NXT)
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#define MICROPY_HW_USB_HS_ULPI_STP (pyb_pin_USB_HS_STP)
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#define MICROPY_HW_USB_HS_ULPI_DIR (pyb_pin_USB_HS_DIR)
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#define MICROPY_HW_USB_HS_ULPI3320 (1)
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#define MICROPY_HW_USB_MAIN_DEV (USB_PHY_HS_ID)
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#define GPIO_AF10_OTG_HS (GPIO_AF10_OTG1_HS)
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#define MICROPY_HW_USB_CDC_RX_DATA_SIZE (1024)
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#define MICROPY_HW_USB_CDC_TX_DATA_SIZE (1024)
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// SD card (SDMMC1, 4-bit)
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#define MICROPY_HW_SDCARD_SDMMC (1)
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#define MICROPY_HW_SDCARD_CK (pyb_pin_SDMMC1_CK)
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#define MICROPY_HW_SDCARD_CMD (pyb_pin_SDMMC1_CMD)
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#define MICROPY_HW_SDCARD_D0 (pyb_pin_SDMMC1_D0)
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#define MICROPY_HW_SDCARD_D1 (pyb_pin_SDMMC1_D1)
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#define MICROPY_HW_SDCARD_D2 (pyb_pin_SDMMC1_D2)
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#define MICROPY_HW_SDCARD_D3 (pyb_pin_SDMMC1_D3)
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#define MICROPY_HW_SDCARD_DETECT_PIN (pyb_pin_SD_DETECT)
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#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP)
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#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET)
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// Ethernet via RMII
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#define MICROPY_HW_ETH_MDC (pyb_pin_ETH_MDC)
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#define MICROPY_HW_ETH_MDIO (pyb_pin_ETH_MDIO)
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#define MICROPY_HW_ETH_RMII_REF_CLK (pyb_pin_ETH_RMII_REF_CLK)
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#define MICROPY_HW_ETH_RMII_CRS_DV (pyb_pin_ETH_RMII_CRS_DV)
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#define MICROPY_HW_ETH_RMII_RXD0 (pyb_pin_ETH_RMII_RXD0)
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#define MICROPY_HW_ETH_RMII_RXD1 (pyb_pin_ETH_RMII_RXD1)
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#define MICROPY_HW_ETH_RMII_TX_EN (pyb_pin_ETH_RMII_TX_EN)
|
||||
#define MICROPY_HW_ETH_RMII_TXD0 (pyb_pin_ETH_RMII_TXD0)
|
||||
#define MICROPY_HW_ETH_RMII_TXD1 (pyb_pin_ETH_RMII_TXD1)
|
||||
|
||||
// SDRAM configuration - 32MB (256Mbit)
|
||||
#define MICROPY_HW_SDRAM_SIZE (256 / 8 * 1024 * 1024) // 256 Mbit = 32 MB
|
||||
#define MICROPY_HW_SDRAM_STARTUP_TEST (1)
|
||||
#define MICROPY_HW_SDRAM_TEST_FAIL_ON_ERROR (1)
|
||||
|
||||
// Timing configuration for 240MHz/2=120MHz (8.33ns)
|
||||
#define MICROPY_HW_SDRAM_CLOCK_PERIOD 2
|
||||
#define MICROPY_HW_SDRAM_CAS_LATENCY 2
|
||||
#define MICROPY_HW_SDRAM_FREQUENCY_KHZ (120000) // 120 MHz
|
||||
#define MICROPY_HW_SDRAM_TIMING_TMRD (2)
|
||||
#define MICROPY_HW_SDRAM_TIMING_TXSR (6)
|
||||
#define MICROPY_HW_SDRAM_TIMING_TRAS (4)
|
||||
#define MICROPY_HW_SDRAM_TIMING_TRC (6)
|
||||
#define MICROPY_HW_SDRAM_TIMING_TWR (2)
|
||||
#define MICROPY_HW_SDRAM_TIMING_TRP (2)
|
||||
#define MICROPY_HW_SDRAM_TIMING_TRCD (2)
|
||||
|
||||
#define MICROPY_HW_SDRAM_ROW_BITS_NUM 12
|
||||
#define MICROPY_HW_SDRAM_MEM_BUS_WIDTH 32
|
||||
#define MICROPY_HW_SDRAM_REFRESH_CYCLES 4096
|
||||
|
||||
#define MICROPY_HW_SDRAM_COLUMN_BITS_NUM 9
|
||||
#define MICROPY_HW_SDRAM_INTERN_BANKS_NUM 4
|
||||
#define MICROPY_HW_SDRAM_RPIPE_DELAY 0
|
||||
#define MICROPY_HW_SDRAM_RBURST (1)
|
||||
#define MICROPY_HW_SDRAM_WRITE_PROTECTION (0)
|
||||
|
||||
#define MICROPY_HW_SDRAM_AUTOREFRESH_NUM (8)
|
||||
#define MICROPY_HW_SDRAM_BURST_LENGTH 1
|
||||
#define MICROPY_HW_SDRAM_REFRESH_RATE (64) // ms
|
||||
|
||||
// SDRAM FMC pin configuration (see pins.csv for CPU pin mapping)
|
||||
#define MICROPY_HW_FMC_SDCKE1 (pyb_pin_FMC_SDCKE1)
|
||||
#define MICROPY_HW_FMC_SDNE1 (pyb_pin_FMC_SDNE1)
|
||||
#define MICROPY_HW_FMC_SDCLK (pyb_pin_FMC_SDCLK)
|
||||
#define MICROPY_HW_FMC_SDNCAS (pyb_pin_FMC_SDNCAS)
|
||||
#define MICROPY_HW_FMC_SDNRAS (pyb_pin_FMC_SDNRAS)
|
||||
#define MICROPY_HW_FMC_SDNWE (pyb_pin_FMC_SDNWE)
|
||||
#define MICROPY_HW_FMC_BA0 (pyb_pin_FMC_BA0)
|
||||
#define MICROPY_HW_FMC_BA1 (pyb_pin_FMC_BA1)
|
||||
#define MICROPY_HW_FMC_NBL0 (pyb_pin_FMC_NBL0)
|
||||
#define MICROPY_HW_FMC_NBL1 (pyb_pin_FMC_NBL1)
|
||||
#define MICROPY_HW_FMC_NBL2 (pyb_pin_FMC_NBL2)
|
||||
#define MICROPY_HW_FMC_NBL3 (pyb_pin_FMC_NBL3)
|
||||
#define MICROPY_HW_FMC_A0 (pyb_pin_FMC_A0)
|
||||
#define MICROPY_HW_FMC_A1 (pyb_pin_FMC_A1)
|
||||
#define MICROPY_HW_FMC_A2 (pyb_pin_FMC_A2)
|
||||
#define MICROPY_HW_FMC_A3 (pyb_pin_FMC_A3)
|
||||
#define MICROPY_HW_FMC_A4 (pyb_pin_FMC_A4)
|
||||
#define MICROPY_HW_FMC_A5 (pyb_pin_FMC_A5)
|
||||
#define MICROPY_HW_FMC_A6 (pyb_pin_FMC_A6)
|
||||
#define MICROPY_HW_FMC_A7 (pyb_pin_FMC_A7)
|
||||
#define MICROPY_HW_FMC_A8 (pyb_pin_FMC_A8)
|
||||
#define MICROPY_HW_FMC_A9 (pyb_pin_FMC_A9)
|
||||
#define MICROPY_HW_FMC_A10 (pyb_pin_FMC_A10)
|
||||
#define MICROPY_HW_FMC_A11 (pyb_pin_FMC_A11)
|
||||
#define MICROPY_HW_FMC_A12 (pyb_pin_FMC_A12)
|
||||
#define MICROPY_HW_FMC_D0 (pyb_pin_FMC_D0)
|
||||
#define MICROPY_HW_FMC_D1 (pyb_pin_FMC_D1)
|
||||
#define MICROPY_HW_FMC_D2 (pyb_pin_FMC_D2)
|
||||
#define MICROPY_HW_FMC_D3 (pyb_pin_FMC_D3)
|
||||
#define MICROPY_HW_FMC_D4 (pyb_pin_FMC_D4)
|
||||
#define MICROPY_HW_FMC_D5 (pyb_pin_FMC_D5)
|
||||
#define MICROPY_HW_FMC_D6 (pyb_pin_FMC_D6)
|
||||
#define MICROPY_HW_FMC_D7 (pyb_pin_FMC_D7)
|
||||
#define MICROPY_HW_FMC_D8 (pyb_pin_FMC_D8)
|
||||
#define MICROPY_HW_FMC_D9 (pyb_pin_FMC_D9)
|
||||
#define MICROPY_HW_FMC_D10 (pyb_pin_FMC_D10)
|
||||
#define MICROPY_HW_FMC_D11 (pyb_pin_FMC_D11)
|
||||
#define MICROPY_HW_FMC_D12 (pyb_pin_FMC_D12)
|
||||
#define MICROPY_HW_FMC_D13 (pyb_pin_FMC_D13)
|
||||
#define MICROPY_HW_FMC_D14 (pyb_pin_FMC_D14)
|
||||
#define MICROPY_HW_FMC_D15 (pyb_pin_FMC_D15)
|
||||
#define MICROPY_HW_FMC_D16 (pyb_pin_FMC_D16)
|
||||
#define MICROPY_HW_FMC_D17 (pyb_pin_FMC_D17)
|
||||
#define MICROPY_HW_FMC_D18 (pyb_pin_FMC_D18)
|
||||
#define MICROPY_HW_FMC_D19 (pyb_pin_FMC_D19)
|
||||
#define MICROPY_HW_FMC_D20 (pyb_pin_FMC_D20)
|
||||
#define MICROPY_HW_FMC_D21 (pyb_pin_FMC_D21)
|
||||
#define MICROPY_HW_FMC_D22 (pyb_pin_FMC_D22)
|
||||
#define MICROPY_HW_FMC_D23 (pyb_pin_FMC_D23)
|
||||
#define MICROPY_HW_FMC_D24 (pyb_pin_FMC_D24)
|
||||
#define MICROPY_HW_FMC_D25 (pyb_pin_FMC_D25)
|
||||
#define MICROPY_HW_FMC_D26 (pyb_pin_FMC_D26)
|
||||
#define MICROPY_HW_FMC_D27 (pyb_pin_FMC_D27)
|
||||
#define MICROPY_HW_FMC_D28 (pyb_pin_FMC_D28)
|
||||
#define MICROPY_HW_FMC_D29 (pyb_pin_FMC_D29)
|
||||
#define MICROPY_HW_FMC_D30 (pyb_pin_FMC_D30)
|
||||
#define MICROPY_HW_FMC_D31 (pyb_pin_FMC_D31)
|
||||
@@ -0,0 +1,21 @@
|
||||
USE_MBOOT = 0
|
||||
USE_PYDFU = 0
|
||||
# For dual core HAL drivers.
|
||||
CFLAGS += -DCORE_CM7
|
||||
|
||||
# MCU settings
|
||||
MCU_SERIES = h7
|
||||
CMSIS_MCU = STM32H747xx
|
||||
MICROPY_FLOAT_IMPL = double
|
||||
AF_FILE = boards/stm32h743_af.csv
|
||||
LD_FILES = boards/STM32H747I_DISCO/stm32h747_disco.ld
|
||||
TEXT0_ADDR = 0x08000000
|
||||
|
||||
# MicroPython settings
|
||||
MICROPY_PY_LWIP = 1
|
||||
MICROPY_PY_SSL = 1
|
||||
MICROPY_SSL_MBEDTLS = 1
|
||||
MICROPY_PY_OPENAMP = 1
|
||||
MICROPY_PY_OPENAMP_REMOTEPROC = 1
|
||||
|
||||
FROZEN_MANIFEST = $(BOARD_DIR)/manifest.py
|
||||
@@ -0,0 +1,137 @@
|
||||
# Arduino Header
|
||||
A0,PA4
|
||||
A1,PF10
|
||||
A2,PA0_C
|
||||
A3,PA1_C
|
||||
A4,PC2_C
|
||||
A5,PC3_C
|
||||
D0,PJ9
|
||||
D1,PJ8
|
||||
D2,PJ3
|
||||
D3,PF8
|
||||
D4,PJ4
|
||||
D5,PA6
|
||||
D6,PJ7
|
||||
D7,PJ0
|
||||
D8,PJ5
|
||||
D9,PJ6
|
||||
D10,PK1
|
||||
D11,PJ10
|
||||
D12,PJ11
|
||||
D13,PK0
|
||||
D14,PD13
|
||||
D15,PD12
|
||||
|
||||
# LEDs
|
||||
LED1,PI12
|
||||
LED2,PI13
|
||||
LED3,PI14
|
||||
LED4,PI15
|
||||
|
||||
# Button
|
||||
SW,PC13
|
||||
|
||||
# SD Card
|
||||
SD_DETECT,PI8
|
||||
-SDMMC1_CK,PC12
|
||||
-SDMMC1_CMD,PD2
|
||||
-SDMMC1_D0,PC8
|
||||
-SDMMC1_D1,PC9
|
||||
-SDMMC1_D2,PC10
|
||||
-SDMMC1_D3,PC11
|
||||
|
||||
# UART (ST-LINK VCP)
|
||||
-UART1_TX,PA9
|
||||
-UART1_RX,PA10
|
||||
|
||||
# USB HS ULPI
|
||||
-USB_HS_CLK,PA5
|
||||
-USB_HS_STP,PC0
|
||||
-USB_HS_NXT,PH4
|
||||
-USB_HS_DIR,PI11
|
||||
-USB_HS_D0,PA3
|
||||
-USB_HS_D1,PB0
|
||||
-USB_HS_D2,PB1
|
||||
-USB_HS_D3,PB5
|
||||
-USB_HS_D4,PB10
|
||||
-USB_HS_D5,PB11
|
||||
-USB_HS_D6,PB12
|
||||
-USB_HS_D7,PB13
|
||||
|
||||
# Ethernet RMII
|
||||
-ETH_MDC,PC1
|
||||
-ETH_MDIO,PA2
|
||||
-ETH_RMII_REF_CLK,PA1
|
||||
-ETH_RMII_CRS_DV,PA7
|
||||
-ETH_RMII_RXD0,PC4
|
||||
-ETH_RMII_RXD1,PC5
|
||||
-ETH_RMII_TX_EN,PG11
|
||||
-ETH_RMII_TXD0,PG13
|
||||
-ETH_RMII_TXD1,PG12
|
||||
|
||||
# QSPI Flash
|
||||
-QSPI_CLK,PB2
|
||||
-QSPI_BK1_NCS,PG6
|
||||
-QSPI_BK1_IO0,PD11
|
||||
-QSPI_BK1_IO1,PF9
|
||||
-QSPI_BK1_IO2,PF7
|
||||
-QSPI_BK1_IO3,PF6
|
||||
|
||||
# FMC SDRAM
|
||||
-FMC_SDCKE1,PH7
|
||||
-FMC_SDNE1,PH6
|
||||
-FMC_SDCLK,PG8
|
||||
-FMC_SDNCAS,PG15
|
||||
-FMC_SDNRAS,PF11
|
||||
-FMC_SDNWE,PH5
|
||||
-FMC_BA0,PG4
|
||||
-FMC_BA1,PG5
|
||||
-FMC_NBL0,PE0
|
||||
-FMC_NBL1,PE1
|
||||
-FMC_NBL2,PI4
|
||||
-FMC_NBL3,PI5
|
||||
-FMC_A0,PF0
|
||||
-FMC_A1,PF1
|
||||
-FMC_A2,PF2
|
||||
-FMC_A3,PF3
|
||||
-FMC_A4,PF4
|
||||
-FMC_A5,PF5
|
||||
-FMC_A6,PF12
|
||||
-FMC_A7,PF13
|
||||
-FMC_A8,PF14
|
||||
-FMC_A9,PF15
|
||||
-FMC_A10,PG0
|
||||
-FMC_A11,PG1
|
||||
-FMC_A12,PG2
|
||||
-FMC_D0,PD14
|
||||
-FMC_D1,PD15
|
||||
-FMC_D2,PD0
|
||||
-FMC_D3,PD1
|
||||
-FMC_D4,PE7
|
||||
-FMC_D5,PE8
|
||||
-FMC_D6,PE9
|
||||
-FMC_D7,PE10
|
||||
-FMC_D8,PE11
|
||||
-FMC_D9,PE12
|
||||
-FMC_D10,PE13
|
||||
-FMC_D11,PE14
|
||||
-FMC_D12,PE15
|
||||
-FMC_D13,PD8
|
||||
-FMC_D14,PD9
|
||||
-FMC_D15,PD10
|
||||
-FMC_D16,PH8
|
||||
-FMC_D17,PH9
|
||||
-FMC_D18,PH10
|
||||
-FMC_D19,PH11
|
||||
-FMC_D20,PH12
|
||||
-FMC_D21,PH13
|
||||
-FMC_D22,PH14
|
||||
-FMC_D23,PH15
|
||||
-FMC_D24,PI0
|
||||
-FMC_D25,PI1
|
||||
-FMC_D26,PI2
|
||||
-FMC_D27,PI3
|
||||
-FMC_D28,PI6
|
||||
-FMC_D29,PI7
|
||||
-FMC_D30,PI9
|
||||
-FMC_D31,PI10
|
||||
|
@@ -0,0 +1,63 @@
|
||||
/*
|
||||
GNU linker script for STM32H747I-DISCO
|
||||
*/
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
ITCM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K
|
||||
DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
|
||||
RAM (xrw) : ORIGIN = 0x24000000, LENGTH = 512K /* AXI SRAM D1 */
|
||||
SRAM1 (xrw) : ORIGIN = 0x30000000, LENGTH = 128K /* SRAM1 D2 */
|
||||
SRAM2 (xrw) : ORIGIN = 0x30020000, LENGTH = 128K /* SRAM2 D2 */
|
||||
SRAM3 (xrw) : ORIGIN = 0x30040000, LENGTH = 32K /* SRAM3 D2 */
|
||||
SRAM4 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K /* SRAM4 D3 */
|
||||
SDRAM (xrw) : ORIGIN = 0xD0000000, LENGTH = 32M /* SDRAM bank 1 */
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1536K /* CM7 firmware */
|
||||
FLASH_CM4 (rx) : ORIGIN = 0x08180000, LENGTH = 512K /* CM4 firmware */
|
||||
}
|
||||
|
||||
/* produce a link error if there is not this amount of RAM for these sections */
|
||||
_minimum_stack_size = 2K;
|
||||
_minimum_heap_size = 16K;
|
||||
|
||||
/* Define the stack. The stack is full descending so begins just above last byte
|
||||
of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve;
|
||||
_sstack = _estack - 16K; /* tunable */
|
||||
|
||||
/* RAM heap extents */
|
||||
_ram_start = ORIGIN(RAM);
|
||||
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
|
||||
_heap_start = _ebss; /* heap starts just after statically allocated memory */
|
||||
_heap_end = _sstack;
|
||||
|
||||
/* OpenAMP shared memory region */
|
||||
_openamp_shm_region_start = ORIGIN(SRAM4);
|
||||
_openamp_shm_region_end = ORIGIN(SRAM4) + LENGTH(SRAM4);
|
||||
|
||||
INCLUDE common_basic.ld
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* GC blocks addresses and sizes */
|
||||
.gc.blocks.table (READONLY) : {
|
||||
. = ALIGN(4);
|
||||
_gc_blocks_table_start = .;
|
||||
|
||||
LONG (ORIGIN(SRAM1));
|
||||
LONG (128K);
|
||||
|
||||
LONG (ORIGIN(SDRAM) + 0M);
|
||||
LONG (8M);
|
||||
|
||||
LONG (ORIGIN(SDRAM) + 8M);
|
||||
LONG (8M);
|
||||
|
||||
LONG (ORIGIN(SDRAM) + 16M);
|
||||
LONG (16M);
|
||||
|
||||
_gc_blocks_table_end = .;
|
||||
. = ALIGN(4);
|
||||
} > FLASH
|
||||
}
|
||||
@@ -0,0 +1,27 @@
|
||||
/* This file is part of the MicroPython project, http://micropython.org/
|
||||
* The MIT License (MIT)
|
||||
* Copyright (c) 2019 Damien P. George
|
||||
*/
|
||||
#ifndef MICROPY_INCLUDED_STM32H7XX_HAL_CONF_H
|
||||
#define MICROPY_INCLUDED_STM32H7XX_HAL_CONF_H
|
||||
|
||||
// Oscillator values in Hz
|
||||
#define HSE_VALUE (25000000)
|
||||
#define LSE_VALUE (32768)
|
||||
#define EXTERNAL_CLOCK_VALUE (12288000)
|
||||
|
||||
// Oscillator timeouts in ms
|
||||
#define HSE_STARTUP_TIMEOUT (5000)
|
||||
#define LSE_STARTUP_TIMEOUT (5000)
|
||||
|
||||
// Required for OpenAMP dual-core synchronization
|
||||
#define HAL_HSEM_MODULE_ENABLED
|
||||
#define HAL_QSPI_MODULE_ENABLED
|
||||
|
||||
#ifdef HAL_HSEM_MODULE_ENABLED
|
||||
#include "stm32h7xx_hal_hsem.h"
|
||||
#endif
|
||||
|
||||
#include "boards/stm32h7xx_hal_conf_base.h"
|
||||
|
||||
#endif // MICROPY_INCLUDED_STM32H7XX_HAL_CONF_H
|
||||
Reference in New Issue
Block a user