mirror of
https://github.com/micropython/micropython.git
synced 2025-12-16 09:50:15 +01:00
tests: Convert all machine.UART tests to use target_wiring.
All the existing `machine.UART` tests in extmod and extmod_hardware are converted to use the new `target_wiring` scheme, which removes a lot of duplicated board-specific settings. All the existing boards that were supported by these UART tests now have their own `target_wiring` file. Some configurations are board specific (eg NUCLEO_WB55) and others are port specific. Signed-off-by: Damien George <damien@micropython.org>
This commit is contained in:
@@ -10,32 +10,7 @@ except (ImportError, AttributeError):
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raise SystemExit
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import time, sys
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# Configure pins based on the target.
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if "alif" in sys.platform:
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uart_id = 1
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tx_pin = None
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elif "rp2" in sys.platform:
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uart_id = 0
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tx_pin = "GPIO0"
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rx_pin = "GPIO1"
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elif "samd" in sys.platform and "ItsyBitsy M0" in sys.implementation._machine:
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uart_id = 0
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tx_pin = "D1"
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rx_pin = "D0"
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elif "samd" in sys.platform and "ItsyBitsy M4" in sys.implementation._machine:
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uart_id = 3
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tx_pin = "D1"
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rx_pin = "D0"
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elif "mimxrt" in sys.platform:
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uart_id = 1
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tx_pin = None
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elif "nrf" in sys.platform:
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uart_id = 0
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tx_pin = None
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else:
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print("Please add support for this test on this platform.")
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raise SystemExit
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from target_wiring import uart_loopback_args, uart_loopback_kwargs
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def irq(u):
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@@ -46,11 +21,7 @@ text = "Hello World" * 20
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# Test that the IRQ is called after the write has completed.
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for bits_per_s in (2400, 9600, 115200):
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if tx_pin is None:
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uart = UART(uart_id, bits_per_s)
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else:
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uart = UART(uart_id, bits_per_s, tx=tx_pin, rx=rx_pin)
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uart = UART(*uart_loopback_args, baudrate=bits_per_s, **uart_loopback_kwargs)
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uart.irq(irq, uart.IRQ_TXIDLE)
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# The IRQ_TXIDLE shall trigger after the message has been sent. Thus
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@@ -8,50 +8,35 @@ except ImportError:
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raise SystemExit
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import time, sys
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from target_wiring import uart_loopback_args, uart_loopback_kwargs
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initial_delay_ms = 0
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bit_margin = 0
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timing_margin_us = 100
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# Configure pins based on the target.
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# Tune test parameters based on the target.
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if "alif" in sys.platform:
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uart_id = 1
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pins = {}
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bit_margin = 1
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elif "esp32" in sys.platform:
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uart_id = 1
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pins = {}
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timing_margin_us = 400
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elif "mimxrt" in sys.platform:
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uart_id = 1
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pins = {}
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initial_delay_ms = 20 # UART sends idle frame after init, so wait for that
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bit_margin = 1
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elif "nrf" in sys.platform:
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timing_margin_us = 130
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elif "pyboard" in sys.platform:
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if "STM32WB" in sys.implementation._machine:
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uart_id = "LP1"
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else:
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uart_id = 4
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pins = {}
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initial_delay_ms = 50 # UART sends idle frame after init, so wait for that
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bit_margin = 1 # first start-bit must wait to sync with the UART clock
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elif "rp2" in sys.platform:
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uart_id = 0
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pins = {"tx": "GPIO0", "rx": "GPIO1"}
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timing_margin_us = 180
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elif "samd" in sys.platform:
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uart_id = 2
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pins = {"tx": "D1", "rx": "D0"}
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timing_margin_us = 300
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bit_margin = 1
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else:
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print("SKIP")
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raise SystemExit
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# Test that write+flush takes the expected amount of time to execute.
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for bits_per_s in (2400, 9600, 115200):
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text = "Hello World"
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uart = UART(uart_id, bits_per_s, bits=8, parity=None, stop=1, **pins)
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uart = UART(*uart_loopback_args, baudrate=bits_per_s, **uart_loopback_kwargs)
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time.sleep_ms(initial_delay_ms)
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start_us = time.ticks_us()
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@@ -12,23 +12,7 @@ except (ImportError, AttributeError):
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raise SystemExit
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import time, sys
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# Configure pins based on the target.
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if "esp32" in sys.platform:
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_machine = sys.implementation._machine
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if "ESP32S2" in _machine or "ESP32C3" in _machine or "ESP32C6" in _machine:
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print("SKIP")
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raise SystemExit
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uart_id = 1
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tx_pin = 4
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rx_pin = 5
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elif "rp2" in sys.platform:
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uart_id = 0
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tx_pin = "GPIO0"
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rx_pin = "GPIO1"
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else:
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print("Please add support for this test on this platform.")
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raise SystemExit
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from target_wiring import uart_loopback_args, uart_loopback_kwargs
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def irq(u):
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@@ -37,7 +21,7 @@ def irq(u):
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# Test that the IRQ is called for each break received.
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for bits_per_s in (2400, 9600, 57600):
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uart = UART(uart_id, bits_per_s, tx=tx_pin, rx=rx_pin)
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uart = UART(*uart_loopback_args, baudrate=bits_per_s, **uart_loopback_kwargs)
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uart.irq(irq, uart.IRQ_BREAK)
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print("write", bits_per_s)
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@@ -13,49 +13,14 @@ except (ImportError, AttributeError):
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import time, sys
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byte_by_byte = False
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# Configure pins based on the target.
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if "alif" in sys.platform:
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uart_id = 1
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tx_pin = None
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rx_pin = None
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elif "esp32" in sys.platform:
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uart_id = 1
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tx_pin = 4
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rx_pin = 5
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elif "pyboard" in sys.platform:
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if "STM32WB" in sys.implementation._machine:
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# LPUART(1) is on PA2/PA3
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uart_id = "LP1"
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else:
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# UART(4) is on PA0/PA1
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uart_id = 4
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tx_pin = None
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rx_pin = None
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elif "samd" in sys.platform and "ItsyBitsy M0" in sys.implementation._machine:
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uart_id = 0
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tx_pin = "D1"
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rx_pin = "D0"
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byte_by_byte = True
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elif "samd" in sys.platform and "ItsyBitsy M4" in sys.implementation._machine:
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uart_id = 3
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tx_pin = "D1"
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rx_pin = "D0"
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elif "nrf" in sys.platform:
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uart_id = 0
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tx_pin = None
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rx_pin = None
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elif "renesas-ra" in sys.platform:
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uart_id = 9
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tx_pin = None # P602 @ RA6M2
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rx_pin = None # P601 @ RA6M2
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elif "CC3200" in sys.implementation._machine:
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if "CC3200" in sys.implementation._machine:
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# CC3200 doesn't work because it's too slow and has an allocation error in the handler.
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print("SKIP")
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raise SystemExit
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else:
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print("Please add support for this test on this platform.")
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raise SystemExit
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from target_wiring import uart_loopback_args, uart_loopback_kwargs
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byte_by_byte = "ItsyBitsy M0" in sys.implementation._machine
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def irq(u):
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@@ -67,11 +32,7 @@ text = "1234"
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# Test that the IRQ is called for each byte received.
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# Use slow baudrates so that the IRQ has time to run.
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for bits_per_s in (2400, 9600):
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if tx_pin is None:
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uart = UART(uart_id, bits_per_s)
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else:
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uart = UART(uart_id, bits_per_s, tx=tx_pin, rx=rx_pin)
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uart = UART(*uart_loopback_args, baudrate=bits_per_s, **uart_loopback_kwargs)
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uart.irq(irq, uart.IRQ_RX)
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print("write", bits_per_s)
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@@ -12,52 +12,10 @@ except (ImportError, AttributeError):
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raise SystemExit
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import time, sys
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from target_wiring import uart_loopback_args, uart_loopback_kwargs
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# Target tuning options.
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tune_wait_initial_rxidle = False
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# Configure pins based on the target.
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if "alif" in sys.platform:
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uart_id = 1
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tx_pin = None
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rx_pin = None
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elif "esp32" in sys.platform:
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uart_id = 1
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tx_pin = 4
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rx_pin = 5
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elif "mimxrt" in sys.platform:
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uart_id = 1
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tx_pin = None
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elif "pyboard" in sys.platform:
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tune_wait_initial_rxidle = True
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if "STM32WB" in sys.implementation._machine:
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# LPUART(1) is on PA2/PA3
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uart_id = "LP1"
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else:
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# UART(4) is on PA0/PA1
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uart_id = 4
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tx_pin = None
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rx_pin = None
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elif "renesas-ra" in sys.platform:
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uart_id = 9
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tx_pin = None # P602 @ RA6M2
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rx_pin = None # P601 @ RA6M2
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elif "rp2" in sys.platform:
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uart_id = 0
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tx_pin = "GPIO0"
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rx_pin = "GPIO1"
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elif "samd" in sys.platform and "ItsyBitsy M0" in sys.implementation._machine:
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uart_id = 0
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tx_pin = "D1"
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rx_pin = "D0"
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byte_by_byte = True
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elif "samd" in sys.platform and "ItsyBitsy M4" in sys.implementation._machine:
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uart_id = 3
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tx_pin = "D1"
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rx_pin = "D0"
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else:
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print("Please add support for this test on this platform.")
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raise SystemExit
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tune_wait_initial_rxidle = sys.platform == "pyboard"
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def irq(u):
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@@ -71,10 +29,7 @@ for bits_per_s in (2400, 9600, 115200):
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print("========")
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print("bits_per_s:", bits_per_s)
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if tx_pin is None:
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uart = UART(uart_id, bits_per_s)
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else:
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uart = UART(uart_id, bits_per_s, tx=tx_pin, rx=rx_pin)
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uart = UART(*uart_loopback_args, baudrate=bits_per_s, **uart_loopback_kwargs)
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# Ignore a possible initial RXIDLE condition after creating UART.
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if tune_wait_initial_rxidle:
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@@ -217,7 +217,13 @@ platform_tests_to_skip = {
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}
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# Tests that require `import target_wiring` to work.
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tests_requiring_target_wiring = ()
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tests_requiring_target_wiring = (
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"extmod/machine_uart_irq_txidle.py",
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"extmod/machine_uart_tx.py",
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"extmod_hardware/machine_uart_irq_break.py",
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"extmod_hardware/machine_uart_irq_rx.py",
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"extmod_hardware/machine_uart_irq_rxidle.py",
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)
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def rm_f(fname):
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8
tests/target_wiring/EK_RA6M2.py
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8
tests/target_wiring/EK_RA6M2.py
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@@ -0,0 +1,8 @@
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# Target wiring for EK_RA6M2.
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#
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# Connect:
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# - P601 to P602
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# UART(9) is on P602/P601.
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uart_loopback_args = (9,)
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uart_loopback_kwargs = {}
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8
tests/target_wiring/NUCLEO_WB55.py
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8
tests/target_wiring/NUCLEO_WB55.py
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@@ -0,0 +1,8 @@
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# Target wiring for NUCLEO_WB55.
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#
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# Connect:
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# - PA2 to PA3
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# LPUART(1) is on PA2/PA3.
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uart_loopback_args = ("LP1",)
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uart_loopback_kwargs = {}
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8
tests/target_wiring/PYBx.py
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8
tests/target_wiring/PYBx.py
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@@ -0,0 +1,8 @@
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# Target wiring for PYBV10, PYBV11, PYBLITEV10, PYBD_SF2, PYBD_SF3, PYBD_SF6.
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#
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# Connect:
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# - X1 to X2
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# UART("XA") is on X1/X2 (usually UART(4) on PA0/PA1).
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uart_loopback_args = ("XA",)
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uart_loopback_kwargs = {}
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7
tests/target_wiring/alif.py
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7
tests/target_wiring/alif.py
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@@ -0,0 +1,7 @@
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# Target wiring for general alif board.
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#
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# Connect:
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# - UART1 TX and RX, usually P0_5 and P0_4
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uart_loopback_args = (1,)
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uart_loopback_kwargs = {}
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7
tests/target_wiring/esp32.py
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7
tests/target_wiring/esp32.py
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@@ -0,0 +1,7 @@
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# Target wiring for general esp32 board.
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#
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# Connect:
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# - GPIO4 to GPIO5
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uart_loopback_args = (1,)
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uart_loopback_kwargs = {"tx": 4, "rx": 5}
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7
tests/target_wiring/mimxrt.py
Normal file
7
tests/target_wiring/mimxrt.py
Normal file
@@ -0,0 +1,7 @@
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# Target wiring for general mimxrt board.
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#
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# Connect:
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# - UART1 TX and RX, usually D0 and D1
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uart_loopback_args = (1,)
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uart_loopback_kwargs = {}
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7
tests/target_wiring/nrf.py
Normal file
7
tests/target_wiring/nrf.py
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@@ -0,0 +1,7 @@
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# Target wiring for general nrf board.
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#
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# Connect:
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# - UART0 TX and RX
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uart_loopback_args = (0,)
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uart_loopback_kwargs = {}
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7
tests/target_wiring/rp2.py
Normal file
7
tests/target_wiring/rp2.py
Normal file
@@ -0,0 +1,7 @@
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# Target wiring for general rp2 board.
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#
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# Connect:
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# - GPIO0 to GPIO1
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uart_loopback_args = (0,)
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uart_loopback_kwargs = {"tx": "GPIO0", "rx": "GPIO1"}
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7
tests/target_wiring/samd.py
Normal file
7
tests/target_wiring/samd.py
Normal file
@@ -0,0 +1,7 @@
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# Target wiring for general samd board.
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#
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# Connect:
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# - D0 to D1
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uart_loopback_args = ()
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uart_loopback_kwargs = {"tx": "D1", "rx": "D0"}
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