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samd/machine_bitstream: Tune ticks for SAMD51 and set pin to output.
Changes in this commit: - Change ticks overhead value for SAMD51. The value was too large and thus timing was quite bad. At 120Mhz it's now within +/- 30ns. - Set the pin to output mode. That way, all Pin identifiers are accepted as argument, not only Pin objects. Tested with ItsyBitsy M4 and M0 boards. Signed-off-by: robert-hh <robert@hammelrath.com>
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@@ -36,7 +36,7 @@
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// No cycle counter on M0, do manual cycle counting instead.
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// STM32F091 @ 48MHz
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// SAMD21 @ 48MHz
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#define NS_CYCLES_PER_ITER_HIGH (3)
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#define NS_CYCLES_PER_ITER_LOW (3)
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#define NS_OVERHEAD_CYCLES_HIGH (12)
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@@ -52,6 +52,7 @@ void machine_bitstream_high_low(mp_hal_pin_obj_t pin, uint32_t *timing_ns, const
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volatile const uint32_t mask = 1 << (pin % 32);
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volatile uint32_t *outclr = &PORT->Group[pin / 32].OUTCLR.reg;
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volatile uint32_t *outset = &PORT->Group[pin / 32].OUTSET.reg;
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mp_hal_pin_output(pin);
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// Convert ns to loop iterations [high_time_0, low_time_0, high_time_1, low_time_1].
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for (size_t i = 0; i < 4; ++i) {
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@@ -163,11 +164,12 @@ void machine_bitstream_high_low(mp_hal_pin_obj_t pin, uint32_t *timing_ns, const
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#else // > CORTEX_M0
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#define NS_TICKS_OVERHEAD (70)
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#define NS_TICKS_OVERHEAD (40)
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void machine_bitstream_high_low(mp_hal_pin_obj_t pin, uint32_t *timing_ns, const uint8_t *buf, size_t len) {
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uint32_t fcpu_mhz = get_cpu_freq() / 1000000;
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uint32_t ticks_overhead = fcpu_mhz * NS_TICKS_OVERHEAD / 1000;
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mp_hal_pin_output(pin);
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// Convert ns to us ticks [high_time_0, period_0, high_time_1, period_1].
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for (size_t i = 0; i < 4; ++i) {
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timing_ns[i] = fcpu_mhz * timing_ns[i] / 1000;
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@@ -191,8 +193,8 @@ void machine_bitstream_high_low(mp_hal_pin_obj_t pin, uint32_t *timing_ns, const
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mp_hal_pin_high(pin);
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while ((mp_hal_ticks_cpu() - start_ticks) < t[0]) {
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}
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b <<= 1;
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mp_hal_pin_low(pin);
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b <<= 1;
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while ((mp_hal_ticks_cpu() - start_ticks) < t[1]) {
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}
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}
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