stm32/boards/NUCLEO_H7A3ZI_Q: Add NUCLEO_H7A3ZI_Q board support.
Some checks failed
JavaScript code lint and formatting with Biome / eslint (push) Has been cancelled
Check code formatting / code-formatting (push) Has been cancelled
Check spelling with codespell / codespell (push) Has been cancelled
Build docs / build (push) Has been cancelled
Check examples / embedding (push) Has been cancelled
Package mpremote / build (push) Has been cancelled
.mpy file format and tools / test (push) Has been cancelled
Build ports metadata / build (push) Has been cancelled
alif port / build_alif (alif_ae3_build) (push) Has been cancelled
cc3200 port / build (push) Has been cancelled
esp32 port / build_idf (esp32_build_c2_c6) (push) Has been cancelled
esp32 port / build_idf (esp32_build_cmod_spiram_s2) (push) Has been cancelled
esp32 port / build_idf (esp32_build_s3_c3) (push) Has been cancelled
esp8266 port / build (push) Has been cancelled
mimxrt port / build (push) Has been cancelled
nrf port / build (push) Has been cancelled
powerpc port / build (push) Has been cancelled
qemu port / build_and_test_arm (bigendian) (push) Has been cancelled
qemu port / build_and_test_arm (sabrelite) (push) Has been cancelled
qemu port / build_and_test_arm (thumb_hardfp) (push) Has been cancelled
qemu port / build_and_test_arm (thumb_softfp) (push) Has been cancelled
qemu port / build_and_test_rv32 (push) Has been cancelled
qemu port / build_and_test_rv64 (push) Has been cancelled
renesas-ra port / build_renesas_ra_board (push) Has been cancelled
rp2 port / build (push) Has been cancelled
samd port / build (push) Has been cancelled
stm32 port / build_stm32 (stm32_misc_build) (push) Has been cancelled
stm32 port / build_stm32 (stm32_nucleo_build) (push) Has been cancelled
stm32 port / build_stm32 (stm32_pyb_build) (push) Has been cancelled
unix port / minimal (push) Has been cancelled
unix port / reproducible (push) Has been cancelled
unix port / standard (push) Has been cancelled
unix port / standard_v2 (push) Has been cancelled
unix port / coverage (push) Has been cancelled
unix port / coverage_32bit (push) Has been cancelled
unix port / nanbox (push) Has been cancelled
unix port / longlong (push) Has been cancelled
unix port / float (push) Has been cancelled
unix port / gil_enabled (push) Has been cancelled
unix port / stackless_clang (push) Has been cancelled
unix port / float_clang (push) Has been cancelled
unix port / settrace_stackless (push) Has been cancelled
unix port / repr_b (push) Has been cancelled
unix port / macos (push) Has been cancelled
unix port / qemu_mips (push) Has been cancelled
unix port / qemu_arm (push) Has been cancelled
unix port / qemu_riscv64 (push) Has been cancelled
unix port / sanitize_address (push) Has been cancelled
unix port / sanitize_undefined (push) Has been cancelled
webassembly port / build (push) Has been cancelled
windows port / build-vs (Debug, true, x64, dev, 2017, [15, 16)) (push) Has been cancelled
windows port / build-vs (Debug, true, x86, dev, 2017, [15, 16)) (push) Has been cancelled
windows port / build-vs (Debug, x64, dev, 2022, [17, 18)) (push) Has been cancelled
windows port / build-vs (Debug, x86, dev, 2022, [17, 18)) (push) Has been cancelled
windows port / build-vs (Release, true, x64, dev, 2017, [15, 16)) (push) Has been cancelled
windows port / build-vs (Release, true, x64, dev, 2019, [16, 17)) (push) Has been cancelled
windows port / build-vs (Release, true, x64, standard, 2017, [15, 16)) (push) Has been cancelled
windows port / build-vs (Release, true, x64, standard, 2019, [16, 17)) (push) Has been cancelled
windows port / build-vs (Release, true, x86, dev, 2017, [15, 16)) (push) Has been cancelled
windows port / build-vs (Release, true, x86, dev, 2019, [16, 17)) (push) Has been cancelled
windows port / build-vs (Release, true, x86, standard, 2017, [15, 16)) (push) Has been cancelled
windows port / build-vs (Release, true, x86, standard, 2019, [16, 17)) (push) Has been cancelled
windows port / build-vs (Release, x64, dev, 2022, [17, 18)) (push) Has been cancelled
windows port / build-vs (Release, x64, standard, 2022, [17, 18)) (push) Has been cancelled
windows port / build-vs (Release, x86, dev, 2022, [17, 18)) (push) Has been cancelled
windows port / build-vs (Release, x86, standard, 2022, [17, 18)) (push) Has been cancelled
windows port / build-mingw (i686, mingw32, dev) (push) Has been cancelled
windows port / build-mingw (i686, mingw32, standard) (push) Has been cancelled
windows port / build-mingw (x86_64, mingw64, dev) (push) Has been cancelled
windows port / build-mingw (x86_64, mingw64, standard) (push) Has been cancelled
windows port / cross-build-on-linux (push) Has been cancelled
zephyr port / build (push) Has been cancelled
Python code lint and formatting with ruff / ruff (push) Has been cancelled

This change adds NUCLEO_H7A3ZI_Q Core Board support to the STM32 port.

NUCLEO_H7A3ZI_Q:
https://www.st.com/en/evaluation-tools/nucleo-h7a3zi-q.html

This board uses STM32H7A3ZI:
https://www.st.com/en/microcontrollers-microprocessors/stm32h7a3zi.html

Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>
This commit is contained in:
Yuuki NAGAO
2025-07-05 22:33:21 +09:00
committed by Damien George
parent a9d04ed0a2
commit 7373338fa9
7 changed files with 336 additions and 0 deletions

View File

@@ -0,0 +1,15 @@
{
"deploy": [
"../deploy.md"
],
"docs": "",
"features": [],
"images": [
"nucleo_h7a3zi_q.jpg"
],
"mcu": "stm32h7",
"product": "Nucleo H7A3ZI-Q",
"thumbnail": "",
"url": "https://www.st.com/ja/evaluation-tools/nucleo-h7a3zi-q.html",
"vendor": "ST Microelectronics"
}

View File

@@ -0,0 +1,7 @@
#include "py/mphal.h"
void NUCLEO_H7A3ZIQ_board_early_init(void) {
// Turn off the USB switch.
mp_hal_pin_output(pyb_pin_OTG_FS_POWER);
mp_hal_pin_low(pyb_pin_OTG_FS_POWER);
}

View File

@@ -0,0 +1,116 @@
#define MICROPY_HW_BOARD_NAME "NUCLEO_H7A3ZI_Q"
#define MICROPY_HW_MCU_NAME "STM32H7A3ZIT6Q"
#define MICROPY_HW_ENABLE_RTC (1)
#define MICROPY_HW_ENABLE_SERVO (1)
#define MICROPY_HW_ENABLE_RNG (0) // RNG needs proper configuration
#define MICROPY_HW_ENABLE_ADC (1)
#define MICROPY_HW_ENABLE_DAC (1)
#define MICROPY_HW_ENABLE_USB (1)
#define MICROPY_HW_ENABLE_SDCARD (0)
#define MICROPY_HW_HAS_SWITCH (1)
#define MICROPY_HW_HAS_FLASH (1)
#define MICROPY_BOARD_EARLY_INIT NUCLEO_H7A3ZIQ_board_early_init
#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (1)
// There is no external HS crystal, instead it comes from ST-LINK MCO output which is 8MHz.
// The following gives a 280Hz CPU speed.
#define MICROPY_HW_CLK_USE_BYPASS (1)
#define MICROPY_HW_CLK_PLLM (2)
#define MICROPY_HW_CLK_PLLN (140)
#define MICROPY_HW_CLK_PLLP (2)
#define MICROPY_HW_CLK_PLLQ (4)
#define MICROPY_HW_CLK_PLLR (2)
#define MICROPY_HW_CLK_PLLVCI (RCC_PLL1VCIRANGE_2)
#define MICROPY_HW_CLK_PLLVCO (RCC_PLL1VCOWIDE)
#define MICROPY_HW_CLK_PLLFRAC (0)
// The USB clock is set using PLL3
#define MICROPY_HW_CLK_PLL3M (1)
#define MICROPY_HW_CLK_PLL3N (24)
#define MICROPY_HW_CLK_PLL3P (2)
#define MICROPY_HW_CLK_PLL3Q (4)
#define MICROPY_HW_CLK_PLL3R (2)
#define MICROPY_HW_CLK_PLL3VCI (RCC_PLL3VCIRANGE_3)
#define MICROPY_HW_CLK_PLL3VCO (RCC_PLL3VCOWIDE)
#define MICROPY_HW_CLK_PLL3FRAC (0)
// 6 wait states when running at 280MHz (VOS0 range)
#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_6
// The board has an external 32kHz crystal attached
#define MICROPY_HW_RTC_USE_LSE (1)
// SMPS configuration
#define MICROPY_HW_PWR_SMPS_CONFIG (PWR_DIRECT_SMPS_SUPPLY)
// UART config
#define MICROPY_HW_UART1_TX (pin_B14) // Arduino D1, pin14 on CN10
#define MICROPY_HW_UART1_RX (pin_B15) // Arduino D0, pin16 on CN10
#define MICROPY_HW_UART2_TX (pin_D5) // pin 6 on CN9
#define MICROPY_HW_UART2_RX (pin_D6) // pin 4 on CN9
#define MICROPY_HW_UART2_RTS (pin_D4) // pin 8 on CN9
#define MICROPY_HW_UART2_CTS (pin_D3) // pin10 on CN9
#define MICROPY_HW_UART3_TX (pin_D8)
#define MICROPY_HW_UART3_RX (pin_D9)
#define MICROPY_HW_UART5_TX (pin_B6)
#define MICROPY_HW_UART5_RX (pin_B12)
#define MICROPY_HW_UART6_TX (pin_C6)
#define MICROPY_HW_UART6_RX (pin_C7)
#define MICROPY_HW_UART7_TX (pin_F7)
#define MICROPY_HW_UART7_RX (pin_F6)
#define MICROPY_HW_UART8_TX (pin_E1)
#define MICROPY_HW_UART8_RX (pin_E0)
// UART3 connects to the STLINK-V3 on the Nucleo board
// and this is exposed as a USB Serial port.
#define MICROPY_HW_UART_REPL PYB_UART_3
#define MICROPY_HW_UART_REPL_BAUD 115200
// I2C buses
#define MICROPY_HW_I2C1_SCL (pin_B8) // Arduino D15, pin 2 on CN7
#define MICROPY_HW_I2C1_SDA (pin_B9) // Arduino D14, pin 4 on CN7
#define MICROPY_HW_I2C4_SCL (pin_F14) // pin19 on CN9
#define MICROPY_HW_I2C4_SDA (pin_F15) // pin12 on CN9
// SPI buses
#define MICROPY_HW_SPI1_NSS (pin_A4) // pin17 on CN7
#define MICROPY_HW_SPI1_SCK (pin_A5) // Arduino D13, pin10 on CN7
#define MICROPY_HW_SPI1_MISO (pin_A6) // Arduino D12, pin12 on CN7
#define MICROPY_HW_SPI1_MOSI (pin_A7) // Arduino D11, pin14 on CN7
#define MICROPY_HW_SPI2_NSS (pin_B12)
#define MICROPY_HW_SPI2_SCK (pin_B10)
#define MICROPY_HW_SPI2_MISO (pin_C2)
#define MICROPY_HW_SPI2_MOSI (pin_C1)
#define MICROPY_HW_SPI3_NSS (pin_A15)
#define MICROPY_HW_SPI3_SCK (pin_B2)
#define MICROPY_HW_SPI3_MISO (pin_C10)
#define MICROPY_HW_SPI3_MOSI (pin_C11)
// USRSW is pulled low. Pressing the button makes the input go high.
#define MICROPY_HW_USRSW_PIN (pin_C13)
#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL)
#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING)
#define MICROPY_HW_USRSW_PRESSED (1)
// LEDs
#define MICROPY_HW_LED1 (pin_B0) // green
#define MICROPY_HW_LED2 (pin_E1) // yellow
#define MICROPY_HW_LED3 (pin_B14) // red
#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin))
#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin))
// USB config
#define MICROPY_HW_USB_HS (1)
#define MICROPY_HW_USB_HS_IN_FS (1)
#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9)
#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10)
// FDCAN bus
#define MICROPY_HW_CAN1_NAME "FDCAN1"
#define MICROPY_HW_CAN1_TX (pin_D1)
#define MICROPY_HW_CAN1_RX (pin_D0)
void NUCLEO_H7A3ZIQ_board_early_init(void);

View File

@@ -0,0 +1,17 @@
USE_MBOOT ?= 0
# MCU settings
MCU_SERIES = h7
CMSIS_MCU = STM32H7A3xxQ
MICROPY_FLOAT_IMPL = double
AF_FILE = boards/stm32h7b3_af.csv
ifeq ($(USE_MBOOT),1)
# When using Mboot all the text goes together after the filesystem
LD_FILES = boards/stm32h743.ld boards/common_blifs.ld
TEXT0_ADDR = 0x08040000
else
# When not using Mboot the ISR text goes first, then the rest after the filesystem
LD_FILES = boards/stm32h7a3.ld boards/common_basic.ld
TEXT0_ADDR = 0x08000000
endif

View File

@@ -0,0 +1,123 @@
A0,PA3
A1,PC0
A2,PC3
A3,PB1
A4,PC2
A5,PF11
A6,PC1
A7,PC5
A8,PA2
D0,PB7
D1,PB6
D2,PG14
D3,PE13
D4,PE14
D5,PE11
D6,PA8
D7,PG12
D8,PG9
D9,PD15
D10,PD14
D11,PA7
D12,PA6
D13,PA5
D14,PB9
D15,PB8
D16,PC6
D17,PB15
D18,PB13
D19,PB12
D20,PA15
D21,PC7
D22,PB5
D23,PB3
D24,PA4
D25,PB4
D26,PG6
D27,PB2
D28,PD13
D29,PD12
D30,PD11
D31,PE2
D32,PA0
D33,PB0
D34,PE0
D35,PB11
D36,PB10
D37,PE15
D38,PE6
D39,PE12
D40,PE10
D41,PE7
D42,PE8
D43,PC8
D44,PC9
D45,PC10
D46,PC11
D47,PC12
D48,PD2
D49,PG10
D50,PG8
D51,PD7
D52,PD6
D53,PD5
D54,PD4
D55,PD3
D56,PE2
D57,PE4
D58,PE5
D59,PE6
D60,PE3
D61,PF8
D62,PF7
D63,PF9
D64,PD10
D65,PB14
D66,PD1
D67,PD0
D68,PF15
D69,PF14
D70,PB5
D71,PE9
D72,PB2
DAC1,PA4
DAC2,PA5
LED1,PB0
LED2,PE1
LED3,PB14
SW,PC13
I2C1_SDA,PB9
I2C1_SCL,PB8
I2C4_SCL,PF14
I2C4_SDA,PF15
OTG_FS_POWER,PD10
OTG_FS_OVER_CURRENT,PG7
USB_VBUS,PA9
USB_ID,PA10
USB_DM,PA11
USB_DP,PA12
UART1_TX,PB14
UART1_RX,PB15
UART2_TX,PD5
UART2_RX,PD6
UART2_RTS,PD4
UART2_CTS,PD3
UART3_TX,PD8
UART3_RX,PD9
UART5_TX,PB6
UART5_RX,PB12
UART6_TX,PC6
UART6_RX,PC7
UART7_TX,PF7
UART7_RX,PF6
UART8_TX,PE1
UART8_RX,PE0
,PC1
,PA2
,PA1
,PA7
,PC4
,PC5
,PG11
,PG13
,PB13
1 A0 PA3
2 A1 PC0
3 A2 PC3
4 A3 PB1
5 A4 PC2
6 A5 PF11
7 A6 PC1
8 A7 PC5
9 A8 PA2
10 D0 PB7
11 D1 PB6
12 D2 PG14
13 D3 PE13
14 D4 PE14
15 D5 PE11
16 D6 PA8
17 D7 PG12
18 D8 PG9
19 D9 PD15
20 D10 PD14
21 D11 PA7
22 D12 PA6
23 D13 PA5
24 D14 PB9
25 D15 PB8
26 D16 PC6
27 D17 PB15
28 D18 PB13
29 D19 PB12
30 D20 PA15
31 D21 PC7
32 D22 PB5
33 D23 PB3
34 D24 PA4
35 D25 PB4
36 D26 PG6
37 D27 PB2
38 D28 PD13
39 D29 PD12
40 D30 PD11
41 D31 PE2
42 D32 PA0
43 D33 PB0
44 D34 PE0
45 D35 PB11
46 D36 PB10
47 D37 PE15
48 D38 PE6
49 D39 PE12
50 D40 PE10
51 D41 PE7
52 D42 PE8
53 D43 PC8
54 D44 PC9
55 D45 PC10
56 D46 PC11
57 D47 PC12
58 D48 PD2
59 D49 PG10
60 D50 PG8
61 D51 PD7
62 D52 PD6
63 D53 PD5
64 D54 PD4
65 D55 PD3
66 D56 PE2
67 D57 PE4
68 D58 PE5
69 D59 PE6
70 D60 PE3
71 D61 PF8
72 D62 PF7
73 D63 PF9
74 D64 PD10
75 D65 PB14
76 D66 PD1
77 D67 PD0
78 D68 PF15
79 D69 PF14
80 D70 PB5
81 D71 PE9
82 D72 PB2
83 DAC1 PA4
84 DAC2 PA5
85 LED1 PB0
86 LED2 PE1
87 LED3 PB14
88 SW PC13
89 I2C1_SDA PB9
90 I2C1_SCL PB8
91 I2C4_SCL PF14
92 I2C4_SDA PF15
93 OTG_FS_POWER PD10
94 OTG_FS_OVER_CURRENT PG7
95 USB_VBUS PA9
96 USB_ID PA10
97 USB_DM PA11
98 USB_DP PA12
99 UART1_TX PB14
100 UART1_RX PB15
101 UART2_TX PD5
102 UART2_RX PD6
103 UART2_RTS PD4
104 UART2_CTS PD3
105 UART3_TX PD8
106 UART3_RX PD9
107 UART5_TX PB6
108 UART5_RX PB12
109 UART6_TX PC6
110 UART6_RX PC7
111 UART7_TX PF7
112 UART7_RX PF6
113 UART8_TX PE1
114 UART8_RX PE0
115 PC1
116 PA2
117 PA1
118 PA7
119 PC4
120 PC5
121 PG11
122 PG13
123 PB13

View File

@@ -0,0 +1,19 @@
/* This file is part of the MicroPython project, http://micropython.org/
* The MIT License (MIT)
* Copyright (c) 2019 Damien P. George
*/
#ifndef MICROPY_INCLUDED_STM32H7XX_HAL_CONF_H
#define MICROPY_INCLUDED_STM32H7XX_HAL_CONF_H
// Oscillator values in Hz
#define HSE_VALUE (8000000)
#define LSE_VALUE (32768)
#define EXTERNAL_CLOCK_VALUE (12288000)
// Oscillator timeouts in ms
#define HSE_STARTUP_TIMEOUT (5000)
#define LSE_STARTUP_TIMEOUT (5000)
#include "boards/stm32h7xx_hal_conf_base.h"
#endif // MICROPY_INCLUDED_STM32H7XX_HAL_CONF_H

View File

@@ -0,0 +1,39 @@
/*
GNU linker script for STM32H7A3
*/
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K /* sectors 0- 15, 128K */
FLASH_APP (rx) : ORIGIN = 0x08020000, LENGTH = 1664K /* sectors 16-223, 1664K */
FLASH_FS (r) : ORIGIN = 0x081c0000, LENGTH = 256K /* sectors 224-255, 256K */
DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 120K /* Used for storage cache */
FS_CACHE (xrw) : ORIGIN = 0x2001e000, LENGTH = 8K /* Used for storage cache */
RAM (xrw) : ORIGIN = 0x24000000, LENGTH = 1024K
RAM_CD (xrw) : ORIGIN = 0x30000000, LENGTH = 128K
RAM_SRD (xrw) : ORIGIN = 0x38000000, LENGTH = 32K
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 16K;
/* Define the stack. The stack is full descending so begins just above last byte
of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve;
_sstack = _estack - 16K; /* tunable */
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_start = _ebss; /* heap starts just after statically allocated memory */
_heap_end = _sstack;
/* Location of filesystem RAM cache */
_micropy_hw_internal_flash_storage_ram_cache_start = ORIGIN(FS_CACHE);
_micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(FS_CACHE) + LENGTH(FS_CACHE);
/* Location of filesystem flash storage */
_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS);
_micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);