Lerking/micropython
1
0
Fork 0
mirror of https://github.com/micropython/micropython.git synced 2026-01-06 20:20:14 +01:00
Code Issues Actions 52 Packages Projects Releases Wiki Activity

stm32/eth_phy: Add support for RTL8211 ETH PHY.

Browse Source 
Signed-off-by: Damien George <damien@micropython.org>
This commit is contained in:
Damien George
2025-10-27 14:48:33 +11:00
parent 769f5cf1a9
commit 7713cdd8fe
4 changed files with 36 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
ports/stm32/eth.c
View File

@@ -216,6 +216,8 @@ int eth_init(eth_t *self, int mac_idx, uint32_t phy_addr, int phy_type) {
self->phy_get_link_status = eth_phy_dp838xx_get_link_status;
} else if (phy_type == ETH_PHY_LAN8720 || phy_type == ETH_PHY_LAN8742) {
self->phy_get_link_status = eth_phy_lan87xx_get_link_status;
} else if (phy_type == ETH_PHY_RTL8211) {
self->phy_get_link_status = eth_phy_rtl8211_get_link_status;
} else {
return -1;
}

3
ports/stm32/eth.h
View File

@@ -30,7 +30,8 @@ enum {
ETH_PHY_LAN8742 = 0,
ETH_PHY_LAN8720,
ETH_PHY_DP83848,
ETH_PHY_DP83825
ETH_PHY_DP83825,
ETH_PHY_RTL8211
};
typedef struct _eth_t eth_t;

31
ports/stm32/eth_phy.c
View File

@@ -40,6 +40,14 @@
#define PHY_SCSR_DP838XX_DUPLEX_Msk (4)
#define PHY_SCSR_DP838XX_10M_Msk (2)
#define PHY_RTL8211_DEFAULT_PAGE (0xa42)
#define PHY_RTL8211_PAGSR_ADDR (0x1f)
#define PHY_RTL8211_PHYSR_PAGE (0xa43)
#define PHY_RTL8211_PHYSR_ADDR (0x1a)
#define PHY_RTL8211_PHYSR_SPEED_Pos (4)
#define PHY_RTL8211_PHYSR_SPEED_Msk (3 << PHY_RTL8211_PHYSR_SPEED_Pos)
#define PHY_RTL8211_PHYSR_DUPLEX_Msk (0x0008)
int16_t eth_phy_lan87xx_get_link_status(uint32_t phy_addr) {
// Get the link mode & speed
uint16_t scsr = eth_phy_read(phy_addr, PHY_SCSR_LAN87XX);
@@ -67,4 +75,27 @@ int16_t eth_phy_dp838xx_get_link_status(uint32_t phy_addr) {
return scsr;
}
int16_t eth_phy_rtl8211_get_link_status(uint32_t phy_addr) {
// Get the link mode & speed
eth_phy_write(phy_addr, PHY_RTL8211_PAGSR_ADDR, PHY_RTL8211_PHYSR_PAGE);
int16_t physr = eth_phy_read(phy_addr, PHY_RTL8211_PHYSR_ADDR);
eth_phy_write(phy_addr, PHY_RTL8211_PAGSR_ADDR, PHY_RTL8211_DEFAULT_PAGE);
int16_t status = 0;
switch ((physr & PHY_RTL8211_PHYSR_SPEED_Msk) >> PHY_RTL8211_PHYSR_SPEED_Pos) {
case 0:
status |= PHY_SPEED_10HALF;
break;
case 1:
status |= PHY_SPEED_100HALF;
break;
case 2:
status |= PHY_SPEED_1000HALF;
break;
}
if (physr & PHY_RTL8211_PHYSR_DUPLEX_Msk) {
status |= PHY_DUPLEX;
}
return status;
}
#endif

1
ports/stm32/eth_phy.h
View File

@@ -63,6 +63,7 @@ void eth_phy_write(uint32_t phy_addr, uint32_t reg, uint32_t val);
int16_t eth_phy_lan87xx_get_link_status(uint32_t phy_addr);
int16_t eth_phy_dp838xx_get_link_status(uint32_t phy_addr);
int16_t eth_phy_rtl8211_get_link_status(uint32_t phy_addr);
#endif