stm32/boards/NUCLEO_H753ZI: Add NUCLEO_H753ZI board support.

Configuration:
- Clock is 8MHz from STLINK MCO, CPU runs at 400MHz
- REPL on USB and on UART connected to ST-Link interface
- Storage is configured for internal flash memory
- 3x LEDs and 1x user button
- Ethernet

Product page:
https://www.st.com/en/evaluation-tools/nucleo-h753zi.html

Signed-off-by: Oliver Joos <oliver.joos@hispeed.ch>

ports/stm32/adc.c

@@ -156,7 +156,7 @@
     defined(STM32H743xx) || defined(STM32H747xx) || \
     defined(STM32H7A3xx) || defined(STM32H7A3xxQ) || \
     defined(STM32H7B3xx) || defined(STM32H7B3xxQ) || \
-    defined(STM32H750xx)
+    defined(STM32H750xx) || defined(STM32H753xx)
 #define VBAT_DIV (4)
 #elif defined(STM32L432xx) || \
     defined(STM32L451xx) || defined(STM32L452xx) || \

ports/stm32/boards/NUCLEO_H753ZI/board.json

@@ -0,0 +1,15 @@
+{
+    "deploy": [
+        "../deploy.md"
+    ],
+    "docs": "",
+    "features": [],
+    "images": [
+        "nucleo_h753zi.jpg"
+    ],
+    "mcu": "stm32h7",
+    "product": "Nucleo H753ZI",
+    "thumbnail": "",
+    "url": "https://www.st.com/en/evaluation-tools/nucleo-h753zi.html",
+    "vendor": "ST Microelectronics"
+}

ports/stm32/boards/NUCLEO_H753ZI/board_init.c

@@ -0,0 +1 @@
+#include "boards/NUCLEO_H743ZI/board_init.c"

ports/stm32/boards/NUCLEO_H753ZI/mpconfigboard.h

@@ -0,0 +1,7 @@
+#include "boards/NUCLEO_H743ZI2/mpconfigboard.h"
+
+#undef MICROPY_HW_BOARD_NAME
+#define MICROPY_HW_BOARD_NAME       "NUCLEO_H753ZI"
+
+#undef MICROPY_HW_MCU_NAME
+#define MICROPY_HW_MCU_NAME         "STM32H753"

ports/stm32/boards/NUCLEO_H753ZI/mpconfigboard.mk

@@ -0,0 +1,5 @@
+FROZEN_MANIFEST ?= boards/NUCLEO_H743ZI/manifest.py
+
+include boards/NUCLEO_H743ZI/mpconfigboard.mk
+
+CMSIS_MCU = STM32H753xx

ports/stm32/boards/NUCLEO_H753ZI/pins.csv

@@ -0,0 +1,130 @@
+A0,PA3
+A1,PC0
+A2,PC3
+A3,PB1
+A4,PC2
+A5,PF10
+A6,PF4
+A7,PF5
+A8,PF6
+D0,PB7
+D1,PB6
+D2,PG14
+D3,PE13
+D4,PE14
+D5,PE11
+D6,PE9
+D7,PG12
+D8,PF3
+D9,PD15
+D10,PD14
+D11,PB5
+D12,PA6
+D13,PA7
+D14,PB9
+D15,PB8
+D16,PC6
+D17,PB15
+D18,PB13
+D19,PB12
+D20,PA15
+D21,PC7
+D22,PB5
+D23,PB3
+D24,PA4
+D25,PB4
+D26,PG6
+D27,PB2
+D28,PD13
+D29,PD12
+D30,PD11
+D31,PE2
+D32,PA0
+D33,PB0
+D34,PE0
+D35,PB11
+D36,PB10
+D37,PE15
+D38,PE6
+D39,PE12
+D40,PE10
+D41,PE7
+D42,PE8
+D43,PC8
+D44,PC9
+D45,PC10
+D46,PC11
+D47,PC12
+D48,PD2
+D49,PG2
+D50,PG3
+D51,PD7
+D52,PD6
+D53,PD5
+D54,PD4
+D55,PD3
+D56,PE2
+D57,PE4
+D58,PE5
+D59,PE6
+D60,PE3
+D61,PF8
+D62,PF7
+D63,PF9
+D64,PG1
+D65,PG0
+D66,PD1
+D67,PD0
+D68,PF0
+D69,PF1
+D70,PF2
+D71,PE9
+D72,PB2
+DAC1,PA4
+DAC2,PA5
+LED1,PB0
+LED2,PE1
+LED3,PB14
+SW,PC13
+I2C1_SDA,PB9
+I2C1_SCL,PB8
+I2C2_SDA,PF0
+I2C2_SCL,PF1
+I2C4_SCL,PF14
+I2C4_SDA,PF15
+SD_D0,PC8
+SD_D1,PC9
+SD_D2,PC10
+SD_D3,PC11
+SD_CMD,PD2
+SD_CK,PC12
+SD_SW,PG2
+OTG_FS_POWER,PD10
+OTG_FS_OVER_CURRENT,PG7
+USB_VBUS,PA9
+USB_ID,PA10
+USB_DM,PA11
+USB_DP,PA12
+UART2_TX,PD5
+UART2_RX,PD6
+UART2_RTS,PD4
+UART2_CTS,PD3
+UART3_TX,PD8
+UART3_RX,PD9
+UART5_TX,PB6
+UART5_RX,PB12
+UART6_TX,PC6
+UART6_RX,PC7
+UART7_TX,PF7
+UART7_RX,PF6
+UART8_TX,PE1
+UART8_RX,PE0
+ETH_MDC,PC1
+ETH_MDIO,PA2
+ETH_RMII_REF_CLK,PA1
+ETH_RMII_CRS_DV,PA7
+ETH_RMII_RXD0,PC4
+ETH_RMII_RXD1,PC5
+ETH_RMII_TX_EN,PG11
+ETH_RMII_TXD0,PG13
+ETH_RMII_TXD1,PB13

ports/stm32/boards/NUCLEO_H753ZI/stm32h7xx_hal_conf.h

@@ -0,0 +1 @@
+#include "boards/NUCLEO_H743ZI/stm32h7xx_hal_conf.h"

ports/stm32/mboot/main.c

@@ -443,7 +443,7 @@ void mp_hal_pin_config_speed(uint32_t port_pin, uint32_t speed) {
 #elif defined(STM32H5)
 #define INTERNAL_FLASH_LAYOUT "@Internal Flash  /0x08000000/???*08Kg"
 #define INTERNAL_FLASH_LAYOUT_HAS_TEMPLATE (1)
-#elif defined(STM32H743xx)
+#elif defined(STM32H743xx) || defined(STM32H753xx)
 #define INTERNAL_FLASH_LAYOUT "@Internal Flash  /0x08000000/16*128Kg"
 #elif defined(STM32H750xx)
 #define INTERNAL_FLASH_LAYOUT "@Internal Flash  /0x08000000/01*128Kg"

ports/stm32/stm32.mk

@@ -43,7 +43,7 @@ ifneq ($(BUILDING_MBOOT),1)
 # Select hardware floating-point support.
 SUPPORTS_HARDWARE_FP_SINGLE = 0
 SUPPORTS_HARDWARE_FP_DOUBLE = 0
-ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),STM32F765xx STM32F767xx STM32F769xx STM32H743xx STM32H747xx STM32H750xx STM32H7A3xx STM32H7A3xxQ STM32H7B3xx STM32H7B3xxQ STM32N657xx))
+ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),STM32F765xx STM32F767xx STM32F769xx STM32H743xx STM32H747xx STM32H750xx STM32H753xx STM32H7A3xx STM32H7A3xxQ STM32H7B3xx STM32H7B3xxQ STM32N657xx))
 CFLAGS_CORTEX_M += -mfpu=fpv5-d16 -mfloat-abi=hard -mfp16-format=ieee
 SUPPORTS_HARDWARE_FP_SINGLE = 1
 SUPPORTS_HARDWARE_FP_DOUBLE = 1