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a69b08b756eae5b59006b93524a8d9c4d78847bc
17651 Commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Chris Webb
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a69b08b756 |
renesas-ra/timer: Support soft IRQ timer callbacks.
machine.Timer() has inconsistent behaviour between ports: some run callbacks in hard IRQ context whereas others schedule them like soft IRQs. As on the rp2 port, add support to the renesas-ra port for a hard= argument to explicitly choose between these, setting the default to True to match the existing behaviour. Signed-off-by: Chris Webb <chris@arachsys.com> |
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Chris Webb
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b7bf24e481 |
rp2/machine_timer: Use mp_irq_dispatch() to reduce duplication.
Now that mp_irq_dispatch() is available to dispatch arbitary hard/soft callbacks, take advantage of this for rp2 machine.Timer. This should slightly reduce binary size. Signed-off-by: Chris Webb <chris@arachsys.com> |
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Chris Webb
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955b6a907c |
extmod/machine_timer: Support hard IRQ soft timer callbacks.
machine.Timer() has inconsistent behaviour between ports: some run callbacks in hard IRQ context whereas others schedule them like soft IRQs. As on the rp2 port, add support to the generic software timer for a hard= argument to explicitly choose between these, setting the default to False to match the existing behaviour. This enables hard timer callbacks for the alif, mimxrt and samd ports. Signed-off-by: Chris Webb <chris@arachsys.com> |
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Chris Webb
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ad11df7f7a |
shared/runtime/softtimer: Add support for hard callbacks.
Add a flag SOFT_TIMER_HARD_CALLBACK to request that a soft timer's python callback is run directly from the IRQ handler with the scheduler and heap locked, instead of being scheduled via mp_sched_schedule(). Signed-off-by: Chris Webb <chris@arachsys.com> |
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Chris Webb
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706cc8d833 |
shared/runtime/mpirq: Factor out mp_irq_dispatch() and use it.
Separate out a routine to call an arbitrary function with arbitrary argument either directly as a hard-IRQ handler or scheduled as a soft-IRQ handler, adjusting mp_irq_handler() to wrap this. This can then be used to implement other hard/soft callbacks, such as for machine.Timer. Signed-off-by: Chris Webb <chris@arachsys.com> |
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Damien George
|
6c9940b1f6 |
stm32/adc: Get ADC working on STM32N6 MCUs.
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Changes made here for N6 are: - set RIF security attributes for ADC12 - clock ADC12 at 50MHz (maximum) so it runs at spec (max 5Msamp/sec) - increase sampling time for standard channels to 46.5 cycles - calibrate ADC in `adc.c` - correctly clear ADC_CFGR1_RES bits in `machine_adc.c` - set preselection register in `machine_adc.c` Signed-off-by: Damien George <damien@micropython.org> |
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robert-hh
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d0d9d978eb |
esp32/machine_uart: Call uart_wait_tx_done() only with driver installed.
Otherwise an error message will pop up at the first instatiation of the UART object. Addresses #18122 / #18123. Signed-off-by: robert-hh <robert@hammelrath.com> |
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Angus Gratton
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046013a1ff |
github/workflows: Run esp32&zephyr daily to keep mstr branch caches hot.
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Currently it seems if master branch doesn't build for 1-2 days then the cached ESP-IDF install (1.6GB) and Zephyr workspace (3.1GB) caches expire. Then each PR branch has to create its own redundant cache instead of falling back to the default branch cache, which is expensive and quickly blows our 10GB cache limit. Currently this is mitigated (and possibly happens more frequently) due to GitHub's relatively soft enforcement of the limit (at time of writing we're using 33GB of 10GB), but apparently they're going to start enforcing it more aggressively in October. (We may find we need to do this twice a day...) This work was funded through GitHub Sponsors. Signed-off-by: Angus Gratton <angus@redyak.com.au> |
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Angus Gratton
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91abffb4d6 |
github/workflows: Retry Windows VC2017 & 2019 install steps.
The Windows 8.1 sdksetup.exe in particular seems seems to fail intermittently pretty often, so retry each step up to four times before failing outright. Delete the Chocolatey temp directory between each run, as it seems like the root cause is a corrupt download. This work was funded through GitHub Sponsors. Signed-off-by: Angus Gratton <angus@redyak.com.au> |
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Damien George
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0d9aafd9f5 |
tools/metrics.py: Compute mpy-cross size as part of size metrics.
Add support to `tools/metrics.py` to compute the size delta of mpy-cross, alongside the sizes of port firmware. This is an easy and cheap addition because mpy-cross is usually built before the ports are. Although the size of mpy-cross is not critical, it's still a nice indication of how changes affect code size, and helps to eliminate any unwanted increases in mpy-cross. Signed-off-by: Damien George <damien@micropython.org> |
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Damien George
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616f35f7f8 |
tests/README: Update docs for run-perfbench.py now that it uses -t.
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Follow up to
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Yuuki NAGAO
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5312614974 |
stm32/rtc: Fix RTC.wakeup issue for STM32G0.
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To clear wakeup interrupt flag, set CWUTF on RTC_SCR instead of RTC_MISR. Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com> |
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Yuuki NAGAO
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9a13688c13 |
stm32/timer: Enable RTCAPB_CLK for STM32G0.
To get worked pyb.RTC and machine.RTC on STM32G0. Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com> |
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Yuuki NAGAO
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8632351983 |
stm32/timer: Fix Timer(4) issue for STM32G0.
The definition of TIM_ENTRY of TIM4 is incorrect. Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com> |
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Yuuki NAGAO
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ddf1a383ca |
stm32/machine_adc: Fix machine.ADC so it works on STM32G0.
Fixes are: - Enable VREG before initializing ADC. - The channel value of internal sensor should convert with __LL_ADC_CHANNEL_TO_DECIMAL_NB(). Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com> |
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Yuuki NAGAO
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7ba82219f3 |
stm32/adc: Fix pyb.ADC issue for STM32G0.
Fixes are: - The internal sensors of STM32G0 are connected channel 12, 13, 14. - Update adc_refcor before reading vbat and tempsensor because reference values are at VDDA=3.0V. - The method of initialize of sampling time is different with other MCUs: STM32G0 should initialize SamplingTimeCommon1/2 first. When reading value from ADC, ADC_ChannelConfTypeDef.SamplingTime should be specified SamplingTimeCommon1 or SamplingTimeCommon2. In this patch, SamplingTimeCommon2 is used for internal sensors and SamplingTimeCommon1 is used for external ADC channels. Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com> |
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Yuuki NAGAO
|
65b2dc255b |
stm32/powerctrlboot: Refactor clock settings for STM32G0.
Clock parameter definitions should be in `mpconfigboard.h` and use them at clock initialization. Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com> |
||
|
Yuuki NAGAO
|
592affce3f |
stm32/make-stmconst.py: Fix missing peripheral consts in stm module.
Lines like the following were not handled by `make-stmconst.py`:
#define APBPERIPH_BASE (PERIPH_BASE)
This leads to missing definitions on stm module. For example, `stm.RTC` is
not defined if `RTC_BASE` is defined as
#define RTC_BASE (APBPERIPH_BASE + 0x00002800UL)
because `APBPERIPH_BASE` is not handled as a valid id.
This patch modifies the RegExp so it can handle the above.
Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>
|
||
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Damien George
|
bf08f601fa |
tests/cmdline: Add tests for using -m combined with sys.atexit.
Signed-off-by: Damien George <damien@micropython.org> |
||
Mike Wang
|
8c389db6ea |
unix/main: Ensure atexit function is called with -m <module>.
Previously, when running `micropython -m <module>` and the module called sys.exit(), the registered atexit function was not executed. This was due to sys.exit() raising a SystemExit exception, which bypassed the atexit handler. This change fixes the issue so that the atexit function is properly invoked when exiting via sys.exit(). Additionally, following the pattern in execute_from_lexer(), mp_hal_set_interrupt_char() and mp_handle_pending() handling were added to ensure that the atexit function is also executed when the user exits via Ctrl-C. Signed-off-by: Mike Wang <mikewang000000@gmail.com> |
||
|
Mike Wang
|
cf097932a2 |
unix/modsocket: Set file descriptor to -1 on close.
After s.close(), s.fileno() now returns -1, matching CPython behavior. Some code relies on this compatibility, as it allows checking whether a socket is closed by testing its fileno() value. This change ensures better interoperability with existing Python code and libraries. Signed-off-by: Mike Wang <mikewang000000@gmail.com> |
||
dependabot[bot]
|
a277fe4a36 |
github/workflows: Bump actions/checkout from 4 to 5.
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Bumps [actions/checkout](https://github.com/actions/checkout) from 4 to 5. - [Release notes](https://github.com/actions/checkout/releases) - [Changelog](https://github.com/actions/checkout/blob/main/CHANGELOG.md) - [Commits](https://github.com/actions/checkout/compare/v4...v5) --- updated-dependencies: - dependency-name: actions/checkout dependency-version: '5' dependency-type: direct:production update-type: version-update:semver-major ... Signed-off-by: dependabot[bot] <support@github.com> |
||
Jeff Epler
|
353814df59 |
tools/ci.sh: Fix missing set -e when run as a script.
This is needed to correctly stop after an error in a CI step when running `ci.sh` as a script. Signed-off-by: Jeff Epler <jepler@unpythonic.net> |
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Alessandro Gatti
|
8757eb715e |
rp2/mpconfigport: Enable Zba opcodes in RISC-V mode.
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This commit enables generation of Zba opcodes by the native emitter for the Pico2, as its RISC-V implementation supports both of those extensions (see section 3.8 of the RP2350 datasheet). Signed-off-by: Alessandro Gatti <a.gatti@frob.it> |
||
|
Alessandro Gatti
|
1fea1e20db |
qemu: Enable Zba opcodes for the VIRT_RV32 board.
This commit enables the usage of the Zba address generation opcodes in the QEMU port when targeting the "VIRT_RV32" board, which emulates a generic RV32 target. Signed-off-by: Alessandro Gatti <a.gatti@frob.it> |
||
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Alessandro Gatti
|
40dbf77415 |
py/emitinlinerv32: Add Zba opcodes to the inline assembler.
This commit adds support for Zba opcodes to the RV32 inline assembler. Three new opcodes were added, SH1ADD, SH2ADD, and SH3ADD, which performs a scaled addition (by 1, 2, or 3 bits respectively). At the moment only qemu's VIRT_RV32 and rp2's RPI_PICO2/RPI_PICO2_W ports support these opcodes (the latter only when using the RISCV variant). Signed-off-by: Alessandro Gatti <a.gatti@frob.it> |
||
|
Alessandro Gatti
|
965c77ade9 |
mpy-cross/main: Add support for RV32 Zba opcodes.
This commit adds a new command line switch to inform the RV32 emitter to use Zba opcodes in its output. A new implementation-specific option was introduced, called "-march-flags", that will contain a list of additional architecture-specific flags to pass to the chosen native emitter implementation. At the moment only the RV32 emitter can make use of this command line facility: if the architecture flags string equals to "zba" (case-sensitive), then the native emitter will emit Zba opcodes if it has a chance to do so. At the moment there is no check on whether additional architecture flags using to build a MPY file are compatible with the target the output code is run on, so use this with caution. Signed-off-by: Alessandro Gatti <a.gatti@frob.it> |
||
|
Alessandro Gatti
|
cb7ca6f1bc |
py/asmrv32: Use RV32 Zba opcodes if possible.
This commit adds optional support for selected Zba opcodes (address generation) to speed up Viper and native code generation on MCUs where those opcodes are supported (namely RP2350). Right now support for these opcodes is opt-in, as extension detection granularity on the RISC-V platform is still a bit in flux. Relying on the 'B' bit in the MISA register may yield both false positives and false negatives depending on the RISC-V implementation the check runs on. As a side-effect of Zba support, regular non-byte load/stores have been made shorter by two bytes. Whilst this makes code using Zba take up the same space as non-Zba code, the former will still be faster as it will have to process just one instruction instead of two, without stalling registers between the shift and the addition needed to compute the final offset. Signed-off-by: Alessandro Gatti <a.gatti@frob.it> |
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Alessandro Gatti
|
42ea7bc32a |
py/mpstate: Make it possible for mpy-cross to set emitter options.
This commit introduces a way for mpy-cross to pass a set of options to the chosen emitter. This is achieved by adding an opaque pointer to the dynamic compiler state structure that is only accessed by emitters that have a need to receive options from mpy-cross when generating code. That's a way to make this feature possible without breaking any existing code or emitter, and without re-engineering the compiler entry point function (together with passing the options struct downstream until it's time to emit code). The main use case for this is letting the RV32 emitter know which optional extensions it can generate code with, to be able to emit better suited code for the platform in use. Signed-off-by: Alessandro Gatti <a.gatti@frob.it> |
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|
Alessandro Gatti
|
44986b1f04 |
qemu/riscv64: Add new QEMU RV64 port.
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This adds a QEMU-based bare metal RISC-V 64 bits port. For the time being only QEMU's "virt" 64 bits board is supported, using the lp64 ABI and the RV64IMC architecture. The port's README is also updated to keep track of these changes. Signed-off-by: Alessandro Gatti <a.gatti@frob.it> |
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Alessandro Gatti
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1b92bda5b8 |
mpy-cross: Add RISC-V RV64IMC support in MPY files.
MPY files can now hold data to be run on RV64IMC. This can be accomplished by passing the `-march=rv64imc` flag to mpy-cross. Signed-off-by: Alessandro Gatti <a.gatti@frob.it> |
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Damien George
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ec1bfcfbb7 |
stm32/main: Use defined constants to enable N6 clocks during low power.
Use constants from the HAL instead of literal numbers to select which peripheral clocks are enabled during low power mode. Signed-off-by: Damien George <damien@micropython.org> |
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Yuuki NAGAO
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8d04f5da7d |
stm32/boards: Set RCC_HSE_BYPASS for relevant NUCLEO boards.
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For NUCLEO boards that does not have HSE crystal, HSEState should set RCC_HSE_BYPASS to use HSE clock from ST-LINK 8MHz. Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com> |
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|
Yuuki NAGAO
|
c4d99f34ae |
stm32/uart: Fix LPUART init failure with low baudrate.
UART prescaler value should set up correctly to initialize LPUART with low baudrate for STM32G0/G4/H5. This can be implemented similarly to STM32H7/N6/WB. Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com> |
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iabdalkader
|
7cbe083b2c |
stm32/uart: Enable UART FIFO for STM32N6.
Signed-off-by: iabdalkader <i.abdalkader@gmail.com> |
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|
Yuuki NAGAO
|
a6efc67064 |
stm32/i2c: Add hardware I2C implementation for STM32G4.
For STM32G4, hardware I2C can implement same as STM32L4 for machine.I2C. This commit makes to be able to use of hardware I2C in machine.I2C. Tested on NUCLEO-G474RE. Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com> |
||
|
Yuuki NAGAO
|
03e3a06de6 |
stm32/boards/NUCLEO_G474RE: Change flash latency for NUCLEO-G474RE.
For NUCLEO-G474RE, FLASH_LATENCY_4 can be specified instead of FLASH_LATENCY_8 because it runs at 170MHz. Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com> |
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|
Yuuki NAGAO
|
06a90e0b4b |
stm32/boards/NUCLEO_F401RE: Change flash latency for NUCLEO-F401RE.
For NUCLEO-F401RE, FLASH_LATENCY_2 can be specified for flash latency because it runs at 84MHz. Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com> |
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Jeff Epler
|
be1a1eb7ac |
tools/ci.sh: Make this script runnable as command.
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This makes it easier to run a sequence of ci steps locally. A help message is also provided. Signed-off-by: Jeff Epler <jepler@gmail.com> |
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dependabot[bot]
|
6681530fc0 |
github/workflows: Bump actions/setup-python from 5 to 6.
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Bumps [actions/setup-python](https://github.com/actions/setup-python) from 5 to 6. - [Release notes](https://github.com/actions/setup-python/releases) - [Commits](https://github.com/actions/setup-python/compare/v5...v6) --- updated-dependencies: - dependency-name: actions/setup-python dependency-version: '6' dependency-type: direct:production update-type: version-update:semver-major ... Signed-off-by: dependabot[bot] <support@github.com> |
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dependabot[bot]
|
c76e601442 |
github/workflows: Bump actions/github-script from 7 to 8.
Bumps [actions/github-script](https://github.com/actions/github-script) from 7 to 8. - [Release notes](https://github.com/actions/github-script/releases) - [Commits](https://github.com/actions/github-script/compare/v7...v8) --- updated-dependencies: - dependency-name: actions/github-script dependency-version: '8' dependency-type: direct:production update-type: version-update:semver-major ... Signed-off-by: dependabot[bot] <support@github.com> |
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Yuuki NAGAO
|
29246ba817 |
tests/run-perfbench.py: Fix issues when -s/-m is used with failed tests.
The option '-s' (--diff-score) or '-m' (--diff-time) fails when the specified result contains tests that was skipped or failed. This patch ignores "skipped: " or "failed: " message. Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com> |
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Ayush Singh
|
2dc6873bbc |
py/py.cmake: Add nlraarch64.
- Required for aarch64 zephyr port targets to build. - Tested with PocketBeagle 2 [0] A53 cores. [0]: https://docs.zephyrproject.org/latest/boards/beagle/pocketbeagle_2/doc/index.html Signed-off-by: Ayush Singh <ayush@beagleboard.org> |
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Jeff Epler
|
a69425b533 |
unix/Makefile: Add additional testing targets.
These are convenience targets for running specific tests as a developer. They are more useful that invoking run-tests directly as they take account of the VARIANT= specified on the make command-line. For instance, you can run all tests matching the regular expression "int" with `make VARIANT=... test//int`. The new targets are all documented in README.md. Signed-off-by: Jeff Epler <jepler@gmail.com> |
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Jeff Epler
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e9da4c9c98 |
unix/modsocket: Use type-checking mp_obj_get_int.
MP_OBJ_SMALL_INT_VALUE would give erroneous results, such as assertion
failures in the coverage build and other oddities like:
>>> s = socket.socket()
>>> s.recv(3.14)
MemoryError: memory allocation failed, allocating 4235896656 bytes
Signed-off-by: Jeff Epler <jepler@gmail.com>
|
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Anson Mansfield
|
6d640a15ab |
py/obj: Document undocumented MP_TYPE_FLAG values.
This adds comments documentign the meaning of the type flag bits `MP_TYPE_FLAG_IS_SUBCLASSED` and `MP_TYPE_FLAG_HAS_SPECIAL_ACCESSORS`, for consistency with the comments added later on documenting the other flags. These flags were were originally made part of the public API in |
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Jeff Epler
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c304046384 |
docs: Always use sphinx_rtd_theme.
Without this, the wy-alert block pushed all the content to the right, making the locally built pages nearly illegible. Signed-off-by: Jeff Epler <jepler@gmail.com> |
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Anson Mansfield
|
2707ae032f |
tests/internal_bench/var: Benchmark ordered map accesses.
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This adds an internal_bench benchmark that benchmarks ordered map linear scan cache performance. Signed-off-by: Anson Mansfield <amansfield@mantaro.com> |
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Anson Mansfield
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d28844d11b |
tests/internal_bench/var: Benchmark checked attribute access.
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This commit also includes a fix to the `var-6.2-instance-speciallookup.py`
test originally added by
|
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Anson Mansfield
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6d09d3e76e |
tests/internal_bench/class_instance: Benchmark instantiation.
This commit adds tests to benchmark the performance of class instantiation. Signed-off-by: Anson Mansfield <amansfield@mantaro.com> |