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All the existing `machine.UART` tests in extmod and extmod_hardware are converted to use the new `target_wiring` scheme, which removes a lot of duplicated board-specific settings. All the existing boards that were supported by these UART tests now have their own `target_wiring` file. Some configurations are board specific (eg NUCLEO_WB55) and others are port specific. Signed-off-by: Damien George <damien@micropython.org>
43 lines
1.3 KiB
Python
43 lines
1.3 KiB
Python
# Test machine.UART.IRQ_TXIDLE firing after a transmission.
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# Does not require any external connections.
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try:
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from machine import UART
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UART.IRQ_TXIDLE
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except (ImportError, AttributeError):
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print("SKIP")
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raise SystemExit
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import time, sys
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from target_wiring import uart_loopback_args, uart_loopback_kwargs
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def irq(u):
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print("IRQ_TXIDLE:", u.irq().flags() == u.IRQ_TXIDLE)
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text = "Hello World" * 20
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# Test that the IRQ is called after the write has completed.
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for bits_per_s in (2400, 9600, 115200):
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uart = UART(*uart_loopback_args, baudrate=bits_per_s, **uart_loopback_kwargs)
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uart.irq(irq, uart.IRQ_TXIDLE)
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# The IRQ_TXIDLE shall trigger after the message has been sent. Thus
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# the test marks a time window close to the expected of the sending
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# and the time at which the IRQ should have been fired.
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# It is just a rough estimation of 10 characters before and
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# 20 characters after the data's end.
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bits_per_char = 10 # 1(startbit) + 8(bits) + 1(stopbit) + 0(parity)
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start_time_us = (len(text) - 10) * bits_per_char * 1_000_000 // bits_per_s
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window_ms = 20 * bits_per_char * 1_000 // bits_per_s + 1
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print("write", bits_per_s)
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uart.write(text)
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time.sleep_us(start_time_us)
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print("ready")
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time.sleep_ms(window_ms)
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print("done")
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