mirror of
https://github.com/andreas-abel/nanoBench.git
synced 2026-01-04 19:40:08 +01:00
improved div_cycles
This commit is contained in:
Andreas Abel
@@ -251,7 +251,7 @@ def writeFile(fileName, content):
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def getMachineCode(objFile):
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try:
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machineCode = subprocess.check_output(['objdump', '-M', 'intel', '-d', objFile]).decode()
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machineCode = subprocess.check_output(['objdump', '-M', 'intel', '-d', objFile]).decode()
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return machineCode.partition('<.text>:\n')[2]
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except subprocess.CalledProcessError as e:
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print('Error (getMachineCode): ' + str(e))
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@@ -321,8 +321,8 @@ def getEventConfig(event):
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if event == 'UOPS_PORT78':
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if arch in ['ICL', 'TGL']: return 'A1.80'
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if event == 'DIV_CYCLES':
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if arch in ['NHM', 'WSM', 'SNB', 'IVB', 'HSW', 'BDW', 'SKL', 'SKX', 'KBL', 'CFL', 'CNL', 'CLX']: return '14.01.CMSK=1' # undocumented on HSW, but seems to work
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if arch in ['ICL', 'TGL']: return '14.09.CMSK=1'
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if arch in ['NHM', 'WSM', 'SNB', 'IVB', 'HSW', 'BDW', 'SKL', 'SKX', 'KBL', 'CFL', 'CNL', 'CLX']: return '14.01' # undocumented on HSW, but seems to work
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if arch in ['ICL', 'TGL']: return '14.09'
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if arch in ['ZEN+', 'ZEN2', 'ZEN3']: return '0D3.00'
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if event == 'ILD_STALL.LCP':
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if arch in ['NHM', 'WSM', 'SNB', 'IVB', 'HSW', 'BDW', 'SKL', 'SKX', 'KBL', 'CFL', 'CNL', 'ICL', 'CLX', 'TGL']: return '87.01'
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@@ -658,7 +658,8 @@ def getIndependentInstructions(instrNode, useDistinctRegs, useIndexedAddr, doNot
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return independentInstructions
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# Returns True iff there are two operands that can use the same register, all reg. operands are non-suppressed, and there are no memory operands
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# Returns True iff there are two operands that can use the same register, all reg. operands are non-suppressed, there are no memory operands, and the
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# instruction does not use the divider
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def hasCommonRegister(instrNode):
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if 'GATHER' in instrNode.attrib['category'] or 'SCATTER' in instrNode.attrib['category']:
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return False
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@@ -666,6 +667,8 @@ def hasCommonRegister(instrNode):
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return False
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if instrNode.find('./operand[@type="reg"][@suppressed="1"]') is not None:
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return False
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if isDivOrSqrtInstr(instrNode):
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return False
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return len(findCommonRegisters(instrNode)) > 0
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def findCommonRegisters(instrNode):
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@@ -1115,106 +1118,113 @@ def getThroughputAndUops(instrNode, useDistinctRegs, useIndexedAddr, htmlReports
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paddingTypes.append('redundant prefixes')
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for paddingType in paddingTypes:
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instrStr = ''
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for i, instr in enumerate(instrIList[0:ic]):
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instrStr += depBreakingInstrs + ';' + config.preInstrCode + ';'
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if paddingType == 'redundant prefixes':
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nPrefixes = max(1, 8 - instrLen) if (not useDepBreakingInstrs and not config.preInstrCode) else (14 - instrLen)
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instrStr += '.byte ' + ','.join(['0x40'] * nPrefixes) + ';' # 'empty' REX prefixes
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instrStr += instr.asm + ';'
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if paddingType == 'long NOPs' and ((i % 4 == 3) or (i == ic - 1)):
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instrStr += '.byte 0x66,0x66,0x66,0x66,0x66,0x66,0x2e,0x0f,0x1f,0x84,0x00,0x00,0x00,0x00,0x00;' # 15-Byte NOP
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# an lfence is added for measuring DIV_CYCLES accurately
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for addLfence in ([False, True] if isDivOrSqrtInstr(instrNode) and (ic == 1) and (repType == 'unrollOnly') else [False]):
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instrStr = ''
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for i, instr in enumerate(instrIList[0:ic]):
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instrStr += depBreakingInstrs + ';' + config.preInstrCode + ';'
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if paddingType == 'redundant prefixes':
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nPrefixes = max(1, 8 - instrLen) if (not useDepBreakingInstrs and not config.preInstrCode) else (14 - instrLen)
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instrStr += '.byte ' + ','.join(['0x40'] * nPrefixes) + ';' # 'empty' REX prefixes
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instrStr += instr.asm + ';'
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if paddingType == 'long NOPs' and ((i % 4 == 3) or (i == ic - 1)):
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instrStr += '.byte 0x66,0x66,0x66,0x66,0x66,0x66,0x2e,0x0f,0x1f,0x84,0x00,0x00,0x00,0x00,0x00;' # 15-Byte NOP
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if repType == 'unrollOnly':
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unrollCount = int(round(500/ic+49, -2)) # should still fit in the icache
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if instrNode.attrib['iclass'] in ['RDRAND', 'RDSEED', 'WBINVD'] or instrNode.attrib['category'] in ['IO', 'IOSTRINGOP']:
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unrollCount = 10
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loopCount = 0
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else:
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# we test with a small loop body so that uops may be delivered from the loop stream detector (LSD)
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# we also test with a larger loop body to minimize potential overhead from the loop itself
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unrollCount = max(1, int(round(10.0/ic)))
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if repType == 'loopSmall':
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loopCount = 1000
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if addLfence:
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instrStr += 'lfence;'
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if repType == 'unrollOnly':
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unrollCount = int(round(500/ic+49, -2)) # should still fit in the icache
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if instrNode.attrib['iclass'] in ['RDRAND', 'RDSEED', 'WBINVD'] or instrNode.attrib['category'] in ['IO', 'IOSTRINGOP']:
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unrollCount = 10
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loopCount = 0
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else:
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loopCount = 100
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unrollCount *= 10
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if minTP < sys.maxsize and minTP > 100:
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unrollCount = 1
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loopCount = 10
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# we test with a small loop body so that uops may be delivered from the loop stream detector (LSD)
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# we also test with a larger loop body to minimize potential overhead from the loop itself
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unrollCount = max(1, int(round(10.0/ic)))
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if repType == 'loopSmall':
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loopCount = 1000
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else:
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loopCount = 100
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unrollCount *= 10
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if minTP < sys.maxsize and minTP > 100:
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unrollCount = 1
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loopCount = 10
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htmlReports.append('<h4>')
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if loopCount > 0:
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htmlReports.append('With loop_count=' + str(loopCount) + (',' if paddingType else ' and') + ' unroll_count=' + str(unrollCount))
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else:
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htmlReports.append('With unroll_count=' + str(unrollCount) + (',' if paddingType else ' and') + ' no inner loop')
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if paddingType:
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htmlReports.append(', and padding (' + paddingType + ')')
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htmlReports.append('</h4>\n')
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htmlReports.append('<h4>')
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if loopCount > 0:
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htmlReports.append('With loop_count=' + str(loopCount) + (',' if paddingType else ' and') + ' unroll_count=' + str(unrollCount))
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else:
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htmlReports.append('With unroll_count=' + str(unrollCount) + (',' if paddingType else ' and') + ' no inner loop')
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if paddingType:
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htmlReports.append(', and padding (' + paddingType + ')')
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htmlReports.append('</h4>\n')
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htmlReports.append('<ul>\n')
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result = runExperiment(instrNode, instrStr, init=init, unrollCount=unrollCount, loopCount=loopCount, basicMode=(loopCount>0),
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htmlReports=htmlReports)
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htmlReports.append('</ul>\n')
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htmlReports.append('<ul>\n')
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result = runExperiment(instrNode, instrStr, init=init, unrollCount=unrollCount, loopCount=loopCount, basicMode=(loopCount>0),
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htmlReports=htmlReports)
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htmlReports.append('</ul>\n')
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cycles = fancyRound(result['Core cycles']/ic)
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cycles = fancyRound(result['Core cycles']/ic)
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#invalid = False
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#if any('PORT' in e for e in result):
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# maxPortUops = max(v/(len(e)-9) for e,v in result.items() if e.startswith('UOPS_PORT') and not '4' in e)
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# if maxPortUops * .98 > result['Core cycles']:
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# print('More uops on ports than cycles, uops: {}, cycles: {}'.format(maxPortUops, result['Core cycles']))
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# #invalid = True
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#invalid = False
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#if any('PORT' in e for e in result):
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# maxPortUops = max(v/(len(e)-9) for e,v in result.items() if e.startswith('UOPS_PORT') and not '4' in e)
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# if maxPortUops * .98 > result['Core cycles']:
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# print('More uops on ports than cycles, uops: {}, cycles: {}'.format(maxPortUops, result['Core cycles']))
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# #invalid = True
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#if not invalid:
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minTP = min(minTP, cycles)
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if repType == 'unrollOnly':
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minTP_noLoop = min(minTP_noLoop, cycles)
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if not useDepBreakingInstrs:
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minTP_noDepBreaking_noLoop = min(minTP_noDepBreaking_noLoop, cycles)
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else:
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minTP_loop = min(minTP_loop, cycles)
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if not addLfence:
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minTP = min(minTP, cycles)
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if repType == 'unrollOnly':
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minTP_noLoop = min(minTP_noLoop, cycles)
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if not useDepBreakingInstrs:
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minTP_noDepBreaking_noLoop = min(minTP_noDepBreaking_noLoop, cycles)
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else:
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minTP_loop = min(minTP_loop, cycles)
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if ic == 1 and (minTP == sys.maxsize or cycles == minTP) and not useDepBreakingInstrs and repType == 'unrollOnly':
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minConfig = config
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minTP_single = min(minTP_single, cycles)
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if ic == 1 and (minTP == sys.maxsize or cycles == minTP) and not useDepBreakingInstrs and repType == 'unrollOnly':
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minConfig = config
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minTP_single = min(minTP_single, cycles)
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if isIntelCPU():
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ports_dict = {int(p[9:]): i for p, i in result.items() if 'UOPS_PORT' in p}
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elif isAMDCPU() and not instrNode.attrib['extension'] == 'BASE':
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# We ignore BASE instructions, as they sometimes wrongly count floating point uops
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ports_dict = {int(p[23:]): i for p, i in result.items() if 'FpuPipeAssignment.Total' in p}
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if isIntelCPU():
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ports_dict = {int(p[9:]): i for p, i in result.items() if 'UOPS_PORT' in p}
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elif isAMDCPU() and not instrNode.attrib['extension'] == 'BASE':
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# We ignore BASE instructions, as they sometimes wrongly count floating point uops
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ports_dict = {int(p[23:]): i for p, i in result.items() if 'FpuPipeAssignment.Total' in p}
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uops = int(result['UOPS']+.2)
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if 'RETIRE_SLOTS' in result:
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uopsFused = int(result['RETIRE_SLOTS']+.2)
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uops = int(result['UOPS']+.2)
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if 'RETIRE_SLOTS' in result:
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uopsFused = int(result['RETIRE_SLOTS']+.2)
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if 'UOPS_MITE' in result:
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uopsMITE = int(result['UOPS_MITE']+.2)
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if 'UOPS_MITE' in result:
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uopsMITE = int(result['UOPS_MITE']+.2)
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if 'UOPS_MS' in result:
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uopsMS = int(result['UOPS_MS']+.2)
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if 'UOPS_MS' in result:
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uopsMS = int(result['UOPS_MS']+.2)
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if 'ILD_STALL.LCP' in result:
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ILD_stalls = int(result['ILD_STALL.LCP'])
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if 'ILD_STALL.LCP' in result:
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ILD_stalls = int(result['ILD_STALL.LCP'])
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if 'DIV_CYCLES' in result:
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divCycles = int(result['DIV_CYCLES']+.2)
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if (not config.preInstrCode) and (((uopsMITE is not None) and (uopsMITE > 1)) or ((uopsMS is not None) and (uopsMS > 0)) or
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(result.get('INST_DECODED.DEC0', 0) > .05) or ((result.get('UOPS_MITE>0', 0) > .95) and (not isBranchInstr(instrNode)))):
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# ToDo: preInstrs
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complexDec = True
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if (not config.preInstrCode) and ((uopsMITE > 1) or (uopsMS > 0) or (result.get('INST_DECODED.DEC0', 0) > .05) or
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((result.get('UOPS_MITE>0', 0) > .95) and (not isBranchInstr(instrNode)))): # ToDo: preInstrs
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complexDec = True
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if complexDec and ('UOPS_MITE>0' in result):
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for nNops in count(1):
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nopStr = str(nNops) + ' NOP' + ('s' if nNops > 1 else '')
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htmlReports.append('<h4>With unroll_count=' + str(unrollCount) +', no inner loop, and ' + nopStr + '</h4>\n')
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htmlReports.append('<ul>\n')
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resultNops = runExperiment(instrNode, instrStr + ('; nop' * nNops), init=init, unrollCount=unrollCount, htmlReports=htmlReports)
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htmlReports.append('</ul>\n')
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if resultNops['UOPS_MITE>0'] > result['UOPS_MITE>0'] +.95:
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nAvailableSimpleDecoders = nNops - 1
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break
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if complexDec and ('UOPS_MITE>0' in result):
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for nNops in count(1):
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nopStr = str(nNops) + ' NOP' + ('s' if nNops > 1 else '')
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htmlReports.append('<h4>With unroll_count=' + str(unrollCount) +', no inner loop, and ' + nopStr + '</h4>\n')
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htmlReports.append('<ul>\n')
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resultNops = runExperiment(instrNode, instrStr + ('; nop' * nNops), init=init, unrollCount=unrollCount, htmlReports=htmlReports)
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htmlReports.append('</ul>\n')
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if resultNops['UOPS_MITE>0'] > result['UOPS_MITE>0'] +.95:
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nAvailableSimpleDecoders = nNops - 1
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break
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else:
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if 'DIV_CYCLES' in result:
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divCyclesTmp = int(result['DIV_CYCLES']+.2)
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divCycles = min(divCycles, divCyclesTmp) if (divCycles is not None) else divCyclesTmp
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htmlReports.append('</div>')
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@@ -3158,7 +3168,7 @@ def main():
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htmlReports = ['<h1>' + instrNode.attrib['string'] + ' - Port Usage' + (' (IACA '+iacaVersion+')' if useIACA else '') + '</h1>']
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for useDistinctRegs in ([True, False] if instrNode in tpDictSameReg else [True]):
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for useIndexedAddr in ([False, True] if useDistinctRegs and (instrNode in tpDictIndexedAddr) else [False]):
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for useIndexedAddr in ([False, True] if useDistinctRegs and (instrNode in tpDictIndexedAddr) else [False]):
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tpResult = None
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if not useDistinctRegs:
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@@ -3190,7 +3200,7 @@ def main():
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if not used_ports:
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htmlReports.append('No uops')
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elif (rem_uops == 1) and (not tpResult.config.preInstrNodes) and (not tpResult.ILD_stalls > 0):
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elif (rem_uops == 1) and (not tpResult.config.preInstrNodes) and (tpResult.ILD_stalls in [None, 0]):
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# one uop instruction
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uopsCombinationList = [(frozenset(used_ports), 1)]
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htmlReports.append('<hr>Port usage: 1*' + ('p' if isIntelCPU() else 'FP') + ''.join(str(p) for p in used_ports))
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@@ -3331,13 +3341,8 @@ def main():
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computePortStr = lambda lst: '+'.join(str(uops)+'*'+portPrefix+''.join(str(p) for p in sorted(c)) for c, uops in sorted(lst, key=lambda x: sorted(x[0])))
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if portUsageList:
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resultNode.attrib['ports'+suffix] = computePortStr(portUsageList)
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portUsageWithDivList = list(portUsageList)
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if divCycles:
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portUsageWithDivList.append((frozenset(['div']), divCycles))
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try:
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resultNode.attrib['TP_ports'+suffix] = "%.2f" % getTP_LP(portUsageWithDivList)
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resultNode.attrib['TP_ports'+suffix] = "%.2f" % getTP_LP(portUsageList)
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except ValueError as err:
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print('Could not solve LP for ' + instrNode.attrib['string'] + ':')
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print(err)
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